From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCH 7/7] ARM: dts: Add Altera Arria10 OCRAM EDAC devicetree entry Date: Wed, 30 Mar 2016 10:27:48 -0500 Message-ID: <1459351668-14622-8-git-send-email-tthayer@opensource.altera.com> References: <1459351668-14622-1-git-send-email-tthayer@opensource.altera.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1459351668-14622-1-git-send-email-tthayer@opensource.altera.com> Sender: linux-doc-owner@vger.kernel.org To: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, dinguyen@opensource.altera.com, grant.likely@linaro.org Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tthayer@opensource.altera.com List-Id: devicetree@vger.kernel.org From: Thor Thayer Add the device tree entries needed to support the Altera On-Chip RAM EDAC on the Arria10 chip. Signed-off-by: Thor Thayer --- arch/arm/boot/dts/socfpga_arria10.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 519e9e4..27cc497 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -612,6 +612,11 @@ compatible = "altr,socfpga-a10-l2-ecc"; reg = <0xffd06010 0x4>; }; + + ocram-ecc@ff8c3000 { + compatible = "altr,socfpga-a10-ocram-ecc"; + reg = <0xff8c3000 0x400>; + }; }; rst: rstmgr@ffd05000 { -- 1.7.9.5