From: Stefan Agner <stefan@agner.ch>
To: dri-devel@lists.freedesktop.org, shawnguo@kernel.org, stefan@agner.ch
Cc: meng.yi@nxp.com, pawel.moll@arm.com, alison.wang@freescale.com,
daniel.vetter@ffwll.ch, mturquette@baylibre.com,
ijc+devicetree@hellion.org.uk, sboyd@codeaurora.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
robh+dt@kernel.org, kernel@pengutronix.de, galak@codeaurora.org,
mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org,
alexander.stein@systec-electronic.com
Subject: [PATCH v3 8/9] ARM: dts: vf610-colibri: enable display controller
Date: Mon, 4 Apr 2016 22:28:40 -0700 [thread overview]
Message-ID: <1459834121-25997-9-git-send-email-stefan@agner.ch> (raw)
In-Reply-To: <1459834121-25997-1-git-send-email-stefan@agner.ch>
Enable dcu node which is used by the DCU DRM driver. Assign the 5.7"
EDT panel with VGA resolution which Toradex sells often with the
evaluation board.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 16 +++++++++++++++
arch/arm/boot/dts/vf-colibri.dtsi | 33 +++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index ed65e0f..f5d4c78 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -18,6 +18,11 @@
clock-frequency = <16000000>;
};
+ panel: panel {
+ compatible = "edt,et057090dhu";
+ backlight = <&bl>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@@ -53,6 +58,13 @@
status = "okay";
};
+&dcu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dcu0_1>;
+ fsl,panel = <&panel>;
+ status = "okay";
+};
+
&dspi1 {
status = "okay";
@@ -100,6 +112,10 @@
status = "okay";
};
+&tcon0 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index 6e556be..5f1847b 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -159,6 +159,39 @@
>;
};
+ pinctrl_dcu0_1: dcu0grp_1 {
+ fsl,pins = <
+ VF610_PAD_PTE0__DCU0_HSYNC 0x1902
+ VF610_PAD_PTE1__DCU0_VSYNC 0x1902
+ VF610_PAD_PTE2__DCU0_PCLK 0x1902
+ VF610_PAD_PTE4__DCU0_DE 0x1902
+ VF610_PAD_PTE5__DCU0_R0 0x1902
+ VF610_PAD_PTE6__DCU0_R1 0x1902
+ VF610_PAD_PTE7__DCU0_R2 0x1902
+ VF610_PAD_PTE8__DCU0_R3 0x1902
+ VF610_PAD_PTE9__DCU0_R4 0x1902
+ VF610_PAD_PTE10__DCU0_R5 0x1902
+ VF610_PAD_PTE11__DCU0_R6 0x1902
+ VF610_PAD_PTE12__DCU0_R7 0x1902
+ VF610_PAD_PTE13__DCU0_G0 0x1902
+ VF610_PAD_PTE14__DCU0_G1 0x1902
+ VF610_PAD_PTE15__DCU0_G2 0x1902
+ VF610_PAD_PTE16__DCU0_G3 0x1902
+ VF610_PAD_PTE17__DCU0_G4 0x1902
+ VF610_PAD_PTE18__DCU0_G5 0x1902
+ VF610_PAD_PTE19__DCU0_G6 0x1902
+ VF610_PAD_PTE20__DCU0_G7 0x1902
+ VF610_PAD_PTE21__DCU0_B0 0x1902
+ VF610_PAD_PTE22__DCU0_B1 0x1902
+ VF610_PAD_PTE23__DCU0_B2 0x1902
+ VF610_PAD_PTE24__DCU0_B3 0x1902
+ VF610_PAD_PTE25__DCU0_B4 0x1902
+ VF610_PAD_PTE26__DCU0_B5 0x1902
+ VF610_PAD_PTE27__DCU0_B6 0x1902
+ VF610_PAD_PTE28__DCU0_B7 0x1902
+ >;
+ };
+
pinctrl_dspi1: dspi1grp {
fsl,pins = <
VF610_PAD_PTD5__DSPI1_CS0 0x33e2
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2016-04-05 5:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-05 5:28 [PATCH v3 0/9] add TCON and Vybrid support Stefan Agner
2016-04-05 5:28 ` [PATCH v3 1/9] ARM: imx: clk-vf610: fix DCU clock tree Stefan Agner
2016-04-12 1:38 ` Shawn Guo
2016-04-13 5:21 ` Stefan Agner
2016-04-16 0:31 ` Stephen Boyd
2016-04-05 5:28 ` [PATCH v3 2/9] ARM: imx: clk-vf610: add TCON ipg clock Stefan Agner
2016-04-05 5:28 ` [PATCH v3 3/9] drm/fsl-dcu: disable clock on initialization failure and remove Stefan Agner
2016-04-05 5:28 ` [PATCH v3 4/9] drm/fsl-dcu: add extra clock for pixel clock Stefan Agner
2016-04-07 17:57 ` Rob Herring
2016-04-05 5:28 ` [PATCH v3 5/9] drm/fsl-dcu: use common clock framework for pixel clock divider Stefan Agner
2016-04-05 5:28 ` [PATCH v3 6/9] drm/fsl-dcu: add TCON driver Stefan Agner
2016-04-05 5:28 ` [PATCH v3 7/9] ARM: dts: vf610: add display nodes Stefan Agner
2016-04-13 6:13 ` Shawn Guo
2016-04-05 5:28 ` Stefan Agner [this message]
2016-04-05 5:28 ` [PATCH v3 9/9] ARM: dts: ls1021a: add pix clock to DCU dts node Stefan Agner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1459834121-25997-9-git-send-email-stefan@agner.ch \
--to=stefan@agner.ch \
--cc=alexander.stein@systec-electronic.com \
--cc=alison.wang@freescale.com \
--cc=daniel.vetter@ffwll.ch \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=galak@codeaurora.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=kernel@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=meng.yi@nxp.com \
--cc=mturquette@baylibre.com \
--cc=pawel.moll@arm.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).