From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Andy Gross <andy.gross@linaro.org>, linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org,
srinivas.kandagatla@linaro.org
Subject: [PATCH v2 01/13] ARM: dts: apq8064: fix the pinctrls for i2c and spi
Date: Tue, 12 Apr 2016 10:33:50 +0100 [thread overview]
Message-ID: <1460453642-5809-2-git-send-email-srinivas.kandagatla@linaro.org> (raw)
In-Reply-To: <1460453642-5809-1-git-send-email-srinivas.kandagatla@linaro.org>
This patch fixes pinctrls for spi and i2c nodes whose default and sleep
states are together, which is incorrect.
Without this patch i2c/spi would not be functional.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 65d0e8d..c6ff8fc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -227,7 +227,8 @@
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-1 = <&i2c1_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
@@ -255,7 +256,8 @@
gsbi2_i2c: i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
- pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-1 = <&i2c2_pins_sleep>;
pinctrl-names = "default", "sleep";
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
@@ -277,7 +279,8 @@
ranges;
gsbi3_i2c: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-1 = <&i2c3_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16280000 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
@@ -302,7 +305,8 @@
gsbi4_i2c: i2c@16380000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
+ pinctrl-0 = <&i2c4_pins>;
+ pinctrl-1 = <&i2c4_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16380000 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
@@ -337,7 +341,8 @@
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
interrupts = <0 155 0>;
- pinctrl-0 = <&spi5_default &spi5_sleep>;
+ pinctrl-0 = <&spi5_default>;
+ pinctrl-1 = <&spi5_sleep>;
pinctrl-names = "default", "sleep";
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
@@ -370,7 +375,8 @@
gsbi6_i2c: i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
+ pinctrl-0 = <&i2c6_pins>;
+ pinctrl-1 = <&i2c6_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16580000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
--
2.5.0
next prev parent reply other threads:[~2016-04-12 9:33 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-12 9:33 [PATCH v2 00/13] ARM: dts: Add DB600c support Srinivas Kandagatla
2016-04-12 9:33 ` Srinivas Kandagatla [this message]
2016-04-12 9:33 ` [PATCH v2 02/13] ARM: dts: apq8064: add support to gsbi1 uart Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 03/13] ARM: dts: apq8064: add gsbi7 i2c support Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 04/13] ARM: dts: db600c: add board support with serial Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 05/13] ARM: dts: db600c: add pmic regulator supplies Srinivas Kandagatla
2016-04-19 19:10 ` Stephen Boyd
2016-04-22 9:11 ` Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 06/13] ARM: dts: db600c: Add eMMC and SD card support Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 07/13] ARM: dts: db600c: add usb support Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 08/13] ARM: dts: db600c: add pcie support Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 09/13] ARM: dts: db600c: add on board sata support Srinivas Kandagatla
2016-04-12 9:33 ` [PATCH v2 10/13] ARM: dts: db600c: Add on board leds support Srinivas Kandagatla
2016-04-12 9:34 ` [PATCH v2 11/13] ARM: dts: db600c: add i2c support Srinivas Kandagatla
2016-04-12 9:34 ` [PATCH v2 12/13] ARM: dts: db600c: add spi support Srinivas Kandagatla
2016-04-12 9:34 ` [PATCH v2 13/13] ARM: dts: db600c: add support to magnetometer Srinivas Kandagatla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1460453642-5809-2-git-send-email-srinivas.kandagatla@linaro.org \
--to=srinivas.kandagatla@linaro.org \
--cc=andy.gross@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).