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From: Laxman Dewangan <ldewangan@nvidia.com>
To: swarren@wwwdotorg.org, thierry.reding@gmail.com,
	linus.walleij@linaro.org, gnurou@gmail.com, robh+dt@kernel.org,
	mark.rutland@arm.com, jonathanh@nvidia.com
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	Laxman Dewangan <ldewangan@nvidia.com>
Subject: [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control
Date: Tue, 12 Apr 2016 20:26:46 +0530	[thread overview]
Message-ID: <1460473007-11535-7-git-send-email-ldewangan@nvidia.com> (raw)
In-Reply-To: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com>

NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure the
voltage level of IO pads based on IO rail voltage and its power
state based on platform usage.

Add DT binding document for detailing the DT properties for
configuring IO pads voltage levels and its power state.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 .../bindings/pinctrl/nvidia,tegra210-io-pad.txt    | 102 +++++++++++++++++++++
 .../dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h  |  24 +++++
 2 files changed, 126 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-io-pad.txt
 create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-io-pad.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-io-pad.txt
new file mode 100644
index 0000000..97cdd4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-io-pad.txt
@@ -0,0 +1,102 @@
+NVIDIA Tegra210 PMC IO pad controller
+
+NVIDIA Tegra210 supports IO pads which can operate at 1.8V or 3.3V I/O
+power rail voltages. SW needs to configure the voltage level of IO pads
+based on platform specific power tree.
+
+The voltage configurations of IO pads should be done in boot if it is not
+going to change other wise dynamically based on IO rail voltage on that
+IO pads.
+
+The node for the Tegra210 io-pad driver must be sub node of pmc@0,7000e400.
+
+Required properties:
+- compatible: "nvidia,tegra210-io-pad"
+
+Please refer to <pinctrl-bindings.txt> in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+Tegra's pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for an
+IO pads, or a list of IO pads. This configuration can include the voltage and
+power enable/disable control
+
+The name of each subnode is not important; all subnodes should be enumerated
+and processed purely based on their content. Each subnode only affects those
+parameters that are explicitly listed. Unspecified is represented as an absent
+property,
+
+See the TRM to determine which properties and values apply to each IO pads.
+Macro values for property values are defined in
+<dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
+
+The voltage supported on the pads are 1.8V and 3.3V. The enums are defined as:
+	For 1.8V, use TEGRA210_IO_RAIL_1800000UV
+	For 3.3V, use TEGRA210_IO_RAIL_3300000UV
+
+Required subnode-properties:
+==========================
+- pins : An array of strings. Each string contains the name of an IO pads. Valid
+	 values for these names are listed below.
+
+Optional subnode-properties:
+==========================
+-nvidia,io-rail-voltage:	Integer. The voltage level of IO pads. The
+				valid values are 1.8V and 3.3V. Macros are
+				defined for these voltage levels in
+				<dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
+					Use TEGRA210_IO_RAIL_1800000UV for 1.8V
+					Use TEGRA210_IO_RAIL_3300000UV for 3.3V
+
+-nvidia,io-pad-deep-power-down: Integer, representing the deep power down state
+				of the IO pads. If this is enable then IO pads
+				will be in power down state and interface is not
+				enabled for any transaction. This is power
+				saving mode of the IO pads. The macros are
+				defined for enable/disable in
+				<dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
+				  TEGRA210_IO_PAD_DEEP_POWER_DOWN_DISABLE for
+					disable.
+				  TEGRA210_IO_PAD_DEEP_POWER_DOWN_ENABLE for
+					enable.
+Valid values for pin are:
+	audio, audio-hv, cam, csia, csib, csic, csid, csie, csif,
+	dbg, debug-nonao, dmic, dp, dsi, dsib, dsic, dsid, emmc, emmc2,
+	gpio, hdmi, hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2,
+	pex-ctrl, sdmmc1, sdmmc3, spi, spi-hv, uart, usb-bias, usb0,
+	usb1, usb2, usb3.
+
+All IO pads do not support the 1.8V/3.3V configurations. Valid values for
+nvidia,io-rail-voltage are:
+	audio-hv, dmic, gpio, sdmmc1, sdmmc3, spi-hv.
+
+All above IO pads supports the deep power down state.
+
+Example:
+	#include <dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h>
+	pmc@0,7000e400 {
+		pmc-pad-control {
+			compatible = "nvidia,tegra210-io-pad";
+			pinctrl-names = "default";
+			pinctrl-0 = <&tegra_io_pad_volt_default>;
+			tegra_io_pad_volt_default: common {
+				audio {
+					pins = "audio";
+					nvidia,io-pad-deep-power-down = <TEGRA210_IO_PAD_DEEP_POWER_DOWN_DISABLE>;
+				};
+				audio-hv {
+					pins = "audio-hv";
+					nvidia,io-rail-voltage = <TEGRA210_IO_RAIL_1800000UV>;
+				};
+				gpio {
+					pins = "gpio";
+					nvidia,io-rail-voltage = <TEGRA210_IO_RAIL_1800000UV>;
+				};
+				rest {
+					pins = "dmic", "sdmmc1", "sdmmc3";
+					nvidia,io-rail-voltage = <TEGRA210_IO_RAIL_1800000UV>;
+				};
+			};
+		};
+	};
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h b/include/dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h
new file mode 100644
index 0000000..e32166b
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h
@@ -0,0 +1,24 @@
+/*
+ * This header provides constants for Tegra210 IO pads pinctrl bindings.
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_TEGRA210_IO_PAD_H
+#define _DT_BINDINGS_PINCTRL_TEGRA210_IO_PAD_H
+
+/* Voltage levels of Tegra210 IO rails. */
+#define TEGRA210_IO_RAIL_1800000UV		0
+#define TEGRA210_IO_RAIL_3300000UV		1
+
+/* Deep power down state enable/disable for Tegra210 IO pads */
+#define TEGRA210_IO_PAD_DEEP_POWER_DOWN_DISABLE	0
+#define TEGRA210_IO_PAD_DEEP_POWER_DOWN_ENABLE	1
+
+#endif
-- 
2.1.4

  parent reply	other threads:[~2016-04-12 14:56 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-12 14:56 [PATCH 0/7] pinctrl: soc/tegra: Add support to configure IO rail voltage and pad power states Laxman Dewangan
     [not found] ` <1460473007-11535-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 14:56   ` [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
     [not found]     ` <1460473007-11535-2-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:26       ` Thierry Reding
2016-04-12 16:58         ` Laxman Dewangan
2016-04-15  7:44         ` Linus Walleij
2016-04-12 14:56 ` [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan
     [not found]   ` <1460473007-11535-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:28     ` Thierry Reding
     [not found]       ` <20160412152830.GB30211-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-04-12 16:59         ` Laxman Dewangan
2016-04-12 18:03           ` Jon Hunter
2016-04-12 17:57             ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 3/7] soc/tegra: pmc: Add interface to get IO rail power status Laxman Dewangan
     [not found]   ` <1460473007-11535-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 18:06     ` kbuild test robot
2016-04-12 18:13     ` Jon Hunter
2016-04-12 14:56 ` [PATCH 4/7] soc/tegra: pmc: Add interface to set voltage of IO rails Laxman Dewangan
2016-04-13  8:47   ` Jon Hunter
2016-04-13  9:00     ` Laxman Dewangan
2016-04-13  9:25       ` Jon Hunter
     [not found]         ` <570E109D.6070805-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13  9:20           ` Laxman Dewangan
2016-04-13  9:56             ` Jon Hunter
     [not found]   ` <1460473007-11535-5-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15  7:54     ` Linus Walleij
     [not found]       ` <CACRpkdbueJ=0+WtNefQ7GHoqU5HY7WFYjL2geFq4vkpTbZesZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15  8:00         ` Mark Brown
     [not found]           ` <20160415080027.GB3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-15  8:25             ` Laxman Dewangan
     [not found]               ` <5710A583.2010102-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15  9:19                 ` Linus Walleij
2016-04-15 16:24   ` Stephen Warren
2016-04-15 16:21     ` Laxman Dewangan
     [not found]       ` <57111524.60708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:41         ` Stephen Warren
     [not found]           ` <571119D5.3040309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-15 16:33             ` Laxman Dewangan
2016-04-15 16:59               ` Stephen Warren
2016-04-12 14:56 ` [PATCH 5/7] soc/tegra: pmc: Register sub-devices of PMC Laxman Dewangan
     [not found]   ` <1460473007-11535-6-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:31     ` Stephen Warren
2016-04-12 14:56 ` Laxman Dewangan [this message]
2016-04-13  9:04   ` [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Jon Hunter
     [not found]     ` <570E0BAE.8090404-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13  9:08       ` Laxman Dewangan
2016-04-13  9:31         ` Jon Hunter
2016-04-15 14:16   ` Jon Hunter
2016-04-15 14:12     ` Laxman Dewangan
     [not found]       ` <5710F6CA.6060700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14         ` Jon Hunter
     [not found]           ` <57110560.80004-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14             ` Laxman Dewangan
2016-04-15 15:45               ` Jon Hunter
2016-04-15 16:41                 ` Laxman Dewangan
2016-04-15 17:44                   ` Jon Hunter
     [not found]                     ` <5711288D.7060701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 17:49                       ` Laxman Dewangan
2016-04-15 18:30                         ` Jon Hunter
     [not found]                           ` <57113340.6090701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 18:43                             ` Laxman Dewangan
2016-04-15 16:35   ` Stephen Warren
2016-04-15 16:31     ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
2016-04-15  8:08   ` Linus Walleij
2016-04-15  8:39     ` Laxman Dewangan
2016-04-15  9:25       ` Linus Walleij
2016-04-15  9:55         ` Laxman Dewangan
2016-04-15 11:15           ` Linus Walleij
     [not found]             ` <CACRpkdbr-9Z1JKMVmwNFyMq+Pg+3hT5c9rKZ1y4wZecnidW9Cg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 11:47               ` Laxman Dewangan
2016-04-15 14:03                 ` Linus Walleij
2016-04-15 13:59                   ` Laxman Dewangan
     [not found]                     ` <5710F3DC.7090906-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19  9:49                       ` Laxman Dewangan
2016-04-26 13:32                 ` Laxman Dewangan
2016-04-26 15:31                   ` Stephen Warren
     [not found]       ` <5710A8A4.90309-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:38         ` Stephen Warren

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