Re: [PATCH v2 1/4] dt-bindings: interrupt-controllers: add description of SIC1 and SIC2

[Sylvain Lemieux <slemieux.tyco-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

On Mon, 2016-04-25 at 09:51 -0500, Rob Herring wrote:
> On Mon, Apr 25, 2016 at 04:00:23AM +0300, Vladimir Zapolskiy wrote:
> > NXP LPC32xx has three interrupt controllers, namely root Main
> > Interrupt Controller (MIC) and two supplementary Sub Interrupt
> > Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2
> > are connected to MIC.
> > 
> > Signed-off-by: Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>
> > ---
> > Changes from v1 to v2:
> > * removed introduced optional "interrupt-controller-name" property,
> >   for users the name of a controller will be constructed from mic/sic
> >   and controller physical address,
> > * removed introduced optional "wakeup-sources" property, a list of
> >   mappings between a hardware interrupt and its correspondent wakeup source
> >   to exit CPU STOP mode will be discussed later on,
> > * other negligible changes (rewording, small letters in unit address etc.)
> > 
> >  .../interrupt-controller/nxp,lpc3220-mic.txt       | 70 ++++++++++++++--------
> >  1 file changed, 46 insertions(+), 24 deletions(-)
> 
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

Acked-by: Sylvain Lemieux <slemieux.tyco-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

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