From: Sergei Ianovich <ynvich-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Akinobu Mita
<akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Alexandre Belloni
<alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
"open list:OPEN FIRMWARE AND..."
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Alessandro Zummo
<a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org>
Subject: Re: [PATCH 0/4] support control with using GPIO lines
Date: Wed, 27 Apr 2016 17:03:19 +0300 [thread overview]
Message-ID: <1461765799.2957.4.camel@gmail.com> (raw)
In-Reply-To: <20160427135012.GP3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
On Wed, 2016-04-27 at 14:50 +0100, Mark Brown wrote:
> On Wed, Apr 27, 2016 at 04:53:18AM +0900, Akinobu Mita wrote:
>
> >
> > For the read data transfer, the address/command byte is sent on the
> > rising edge of the first eight SCLK cycles and the read data byte
> > is
> > transmitted on the falling edge of the next eight SCL cycles.
> That's an innovative and exciting hardware design :/ Definitely
> doesn't
> seem to correspond too closely to any SPI mode I can think of.
DS1302 uses the standard MicroWire half-duplex transfer timing. The
timing can be handled by eg. PXA270 built-in SPI controller with proper
configuration.
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next prev parent reply other threads:[~2016-04-27 14:03 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-10 14:59 [PATCH 0/4] support control with using GPIO lines Akinobu Mita
[not found] ` <1460300366-25248-1-git-send-email-akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-04-10 14:59 ` [PATCH 1/4] rtc: ds1302: fix error check in set_time Akinobu Mita
[not found] ` <1460300366-25248-2-git-send-email-akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-04-10 15:17 ` Alexandre Belloni
2016-04-10 14:59 ` [PATCH 2/4] rtc: ds1302: fix write value for day of week register Akinobu Mita
[not found] ` <1460300366-25248-3-git-send-email-akinobu.mita-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-04-10 15:17 ` Alexandre Belloni
2016-04-10 14:59 ` [PATCH 3/4] rtc: ds1302: add register access abstraction layer Akinobu Mita
2016-04-10 14:59 ` [PATCH 4/4] rtc: ds1302: support control with using GPIO lines Akinobu Mita
2016-04-10 15:12 ` [PATCH 0/4] " Alexandre Belloni
[not found] ` <20160410151237.GD5377-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org>
2016-04-10 15:23 ` Sergei Ianovich
[not found] ` <1460301781.17404.171.camel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-04-10 15:38 ` Alexandre Belloni
[not found] ` <20160410153855.GG5377-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org>
2016-04-12 1:25 ` Mark Brown
[not found] ` <20160412012518.GQ3351-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-26 19:53 ` Akinobu Mita
[not found] ` <CAC5umyguFq7vBenkJYM8AWCNJ3oGBKzKAMHHMsO=+OFHtE4b0A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-27 13:50 ` Mark Brown
[not found] ` <20160427135012.GP3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-27 14:03 ` Sergei Ianovich [this message]
[not found] ` <1461765799.2957.4.camel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-04-29 5:40 ` Akinobu Mita
[not found] ` <CAC5umyhLZ7Nvakf84qS73HG=H39mjYf5Lv=BPFnqZt-rTrZvCA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-06-26 0:55 ` Alexandre Belloni
[not found] ` <20160626005534.GY5809-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org>
2016-06-27 10:23 ` Akinobu Mita
2016-04-11 19:46 ` Rob Herring
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