From: Scott Wood <oss@buserror.net>
To: Qiang Zhao <qiang.zhao@nxp.com>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Xiaobo Xie <xiaobo.xie@nxp.com>, Yang-Leo Li <leoyang.li@nxp.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings.
Date: Mon, 16 May 2016 20:41:33 -0500 [thread overview]
Message-ID: <1463449293.16584.127.camel@buserror.net> (raw)
In-Reply-To: <AM3PR04MB118504BB6430CBEC8AA4886491480@AM3PR04MB1185.eurprd04.prod.outlook.com>
On Tue, 2016-05-17 at 01:18 +0000, Qiang Zhao wrote:
> On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote:
> > -----Original Message-----
> > From: Scott Wood [mailto:oss@buserror.net]
> > Sent: Tuesday, May 17, 2016 7:22 AM
> > To: Qiang Zhao <qiang.zhao@nxp.com>
> > Cc: robh+dt@kernel.org; devicetree@vger.kernel.org; linux-
> > kernel@vger.kernel.org; Xiaobo Xie <xiaobo.xie@nxp.com>; Yang-Leo Li
> > <leoyang.li@nxp.com>; linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree
> > bindings.
> >
> > On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote:
> > > Add IC, SI and SIRAM document of QE to
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> > >
> > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> > > Acked-by: Rob Herring <robh@kernel.org>
> > > ---
> > > changes for v2
> > > - Add interrupt-controller in Required properties
> > > - delete address-cells and size-cells for qe-si and qe-siram Changes
> > > for v3
> > > - Add SoC specific caompatible strings to qe-si and qe-siram Changes
> > > for v4
> > > - NA
> > > Changes for v5
> > > - NA
> > >
> > > .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50
> > > ++++++++++++++++++++++
> > > 1 file changed, 50 insertions(+)
> > > +* Serial Interface Block (SI)
> > > +
> > > +The SI manages the routing of eight TDM lines to the QE block serial
> > > +drivers , the MCC and the UCCs, for receive and transmit.
> > > +
> > > +Required properties:
> > > +- compatible : should be "fsl,t1040-qe-si".
> > > +- reg : Address range of SI register set.
> >
> > Is t1040 the only chip that has or will ever have this?
>
> There also be t1024 and ls1043 supporting si.
> I thought to add them when adding their device node.
> If you think it is better to add them now, I will modify.
The binding is saying that the compatible "should" be "fsl,t1040-qe-si"
regardless of whether it's actually a t1040. Instead say that compatible must
include "fsl,<chip>-qe-si" and give t1040 as an example. If you intend
"fsl,t1040-qe-si" to be something that other compatible chips list, in
addition to their own <chip> compatibles, then also say that explicitly.
-Scott
prev parent reply other threads:[~2016-05-17 1:41 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-09 1:21 [PATCH v5 1/7] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
[not found] ` <1457486494-11377-1-git-send-email-qiang.zhao-3arQi8VN3Tc@public.gmane.org>
2016-03-09 1:21 ` [PATCH v5 2/7] QE: Add ucc hdlc document to bindings Zhao Qiang
2016-03-09 1:21 ` [PATCH v5 3/7] QE: Add uqe_serial " Zhao Qiang
2016-03-17 16:27 ` Rob Herring
2016-03-18 0:48 ` Qiang Zhao
2016-03-09 1:21 ` [PATCH v5 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl Zhao Qiang
2016-03-09 1:21 ` [PATCH v5 6/7] T104xRDB: Add qe node to t104xrdb Zhao Qiang
2016-03-09 1:21 ` [PATCH v5 7/7] T104xQDS: Add qe node to t104xqds Zhao Qiang
2016-03-09 1:21 ` [PATCH v5 5/7] T104xD4RDB: Add qe node to t104xd4rdb Zhao Qiang
2016-05-16 23:22 ` [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings Scott Wood
2016-05-17 1:18 ` Qiang Zhao
2016-05-17 1:41 ` Scott Wood [this message]
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