From: YT Shen <yt.shen@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Russell King <linux@arm.linux.org.uk>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
emil.l.velikov@gmail.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
Mao Huang <littlecvr@chromium.org>,
srv_heupstream@mediatek.com, Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org,
Kumar Gala <galak@codeaurora.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
yingjoe.chen@mediatek.com, Sascha Hauer <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC v2 2/5] drm/mediatke: add support for Mediatek SoC MT2701
Date: Fri, 27 May 2016 15:29:00 +0800 [thread overview]
Message-ID: <1464334140.31149.14.camel@mtksdaap41> (raw)
In-Reply-To: <1463994590.31921.14.camel@mtksdaap41>
Hi CK,
On Mon, 2016-05-23 at 17:09 +0800, CK Hu wrote:
> Hi, YT:
>
> Some comments below.
>
> On Fri, 2016-05-20 at 23:05 +0800, yt.shen@mediatek.com wrote:
> > From: YT Shen <yt.shen@mediatek.com>
> >
> > This patch add support for the Mediatek MT2701 DISP subsystem.
> > There is only one OVL engine in MT2701.
> >
> > Signed-off-by: YT Shen <yt.shen@mediatek.com>
> >
> > +static void mtk_ddp_mux_sel(void __iomem *config_regs,
> > + enum mtk_ddp_comp_id cur, enum mtk_ddp_comp_id next)
> > +{
> > + if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
> > + writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
> > + config_regs + DISP_REG_CONFIG_OUT_SEL);
> > + }
> > +}
> > +
>
> The function name 'mux' looks strange. The register written here
> controls the single output selection. I prefer to rename it as
> mtk_ddp_sout_sel().
OK, I will rename this function in the next version.
>
> >
> > -static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
> > +static const enum mtk_ddp_comp_id mtk_ddp_main_2701[] = {
> > + DDP_COMPONENT_OVL0,
> > + DDP_COMPONENT_RDMA0,
> > + DDP_COMPONENT_COLOR0,
> > + DDP_COMPONENT_BLS,
> > + DDP_COMPONENT_DSI0,
> > +};
> > +
> > +static const enum mtk_ddp_comp_id mtk_ddp_ext_2701[] = {
> > + DDP_COMPONENT_OVL0,
> > + DDP_COMPONENT_DSI0,
> > +};
> > +
>
> These two pipelines has the same component such as OVL0 and DSI0. I
> think user program could not enable both crtc at the same time. Maybe
> MT2701 has only one crtc, so you should modify initial flow to create
> only one crtc for main display. Or it's typo for external display pipe,
> please correct it.
MT2701 hardware can support two output concurrently, but we haven't
implement DPI path yet. We will change it like this:
static const enum mtk_ddp_comp_id mtk_ddp_ext_2701[] = {
DDP_COMPONENT_RDMA1,
DDP_COMPONENT_DPI0,
};
Thanks.
yt.shen
>
>
> Regards,
> CK
>
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next prev parent reply other threads:[~2016-05-27 7:29 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-20 15:05 [RFC v2 0/5] MT2701 DRM support yt.shen
2016-05-20 15:05 ` [RFC v2 1/5] drm/mediatek: rename macros, add chip suffix yt.shen
2016-05-27 9:30 ` Emil Velikov
2016-05-30 10:23 ` YT Shen
2016-05-30 10:41 ` Thierry Reding
2016-06-01 9:09 ` YT Shen
2016-05-20 15:05 ` [RFC v2 2/5] drm/mediatke: add support for Mediatek SoC MT2701 yt.shen
[not found] ` <1463756736-46573-3-git-send-email-yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2016-05-23 9:09 ` CK Hu
2016-05-27 7:29 ` YT Shen [this message]
2016-05-27 9:35 ` Emil Velikov
2016-05-30 10:24 ` YT Shen
2016-05-20 15:05 ` [RFC v2 3/5] drm/mediatek: add *driver_data for different hardware settings yt.shen
2016-05-23 9:43 ` CK Hu
2016-05-27 7:31 ` YT Shen
2016-05-27 9:24 ` Emil Velikov
2016-05-30 10:26 ` YT Shen
2016-05-30 10:45 ` Thierry Reding
2016-06-01 9:10 ` YT Shen
2016-05-20 15:05 ` [RFC v2 4/5] drm/mediatek: add shadow register support yt.shen
2016-05-20 15:05 ` [RFC v2 5/5] arm: dts: mt2701: Add display subsystem related nodes for MT2701 yt.shen
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