From: Jon Hunter <jonathanh@nvidia.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Kevin Hilman <khilman@kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Lars-Peter Clausen <lars@metafoo.de>,
Linus Walleij <linus.walleij@linaro.org>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH V6 7/9] irqchip/gic: Prepare for adding platform driver
Date: Tue, 7 Jun 2016 16:12:32 +0100 [thread overview]
Message-ID: <1465312354-27778-8-git-send-email-jonathanh@nvidia.com> (raw)
In-Reply-To: <1465312354-27778-1-git-send-email-jonathanh@nvidia.com>
To support GICs that require runtime power management, it is necessary
to add a platform driver, so that the probing of the chip can be
deferred if resources, such as a power-domain, is not yet available.
To prepare for adding a platform driver:
1. Drop the __init section from the gic_dist_config() so this can be
re-used by the platform driver.
2. Add prototypes for functions required by the platform driver to the
GIC header file so they can be re-used.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/irqchip/irq-gic-common.c | 4 ++--
drivers/irqchip/irq-gic.c | 14 +++++++-------
include/linux/irqchip/arm-gic.h | 5 +++++
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
index 89e7423f0ebb..9ae71804b5dd 100644
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -90,8 +90,8 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
return ret;
}
-void __init gic_dist_config(void __iomem *base, int gic_irqs,
- void (*sync_access)(void))
+void gic_dist_config(void __iomem *base, int gic_irqs,
+ void (*sync_access)(void))
{
unsigned int i;
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 94eab6e23124..141ea5801784 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -449,7 +449,7 @@ static void gic_cpu_if_up(struct gic_chip_data *gic)
}
-static void __init gic_dist_init(struct gic_chip_data *gic)
+static void gic_dist_init(struct gic_chip_data *gic)
{
unsigned int i;
u32 cpumask;
@@ -535,7 +535,7 @@ int gic_cpu_if_down(unsigned int gic_nr)
* this function, no interrupts will be delivered by the GIC, and another
* platform-specific wakeup source must be enabled.
*/
-static void gic_dist_save(struct gic_chip_data *gic)
+void gic_dist_save(struct gic_chip_data *gic)
{
unsigned int gic_irqs;
void __iomem *dist_base;
@@ -574,7 +574,7 @@ static void gic_dist_save(struct gic_chip_data *gic)
* handled normally, but any edge interrupts that occured will not be seen by
* the GIC and need to be handled by the platform-specific wakeup source.
*/
-static void gic_dist_restore(struct gic_chip_data *gic)
+void gic_dist_restore(struct gic_chip_data *gic)
{
unsigned int gic_irqs;
unsigned int i;
@@ -620,7 +620,7 @@ static void gic_dist_restore(struct gic_chip_data *gic)
writel_relaxed(GICD_ENABLE, dist_base + GIC_DIST_CTRL);
}
-static void gic_cpu_save(struct gic_chip_data *gic)
+void gic_cpu_save(struct gic_chip_data *gic)
{
int i;
u32 *ptr;
@@ -650,7 +650,7 @@ static void gic_cpu_save(struct gic_chip_data *gic)
}
-static void gic_cpu_restore(struct gic_chip_data *gic)
+void gic_cpu_restore(struct gic_chip_data *gic)
{
int i;
u32 *ptr;
@@ -727,7 +727,7 @@ static struct notifier_block gic_notifier_block = {
.notifier_call = gic_notifier,
};
-static int __init gic_pm_init(struct gic_chip_data *gic)
+static int gic_pm_init(struct gic_chip_data *gic)
{
gic->saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
sizeof(u32));
@@ -757,7 +757,7 @@ free_ppi_enable:
return -ENOMEM;
}
#else
-static int __init gic_pm_init(struct gic_chip_data *gic)
+static int gic_pm_init(struct gic_chip_data *gic)
{
return 0;
}
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index fd051855539b..ffcbd8b9a4ff 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -101,9 +101,14 @@
#include <linux/irqdomain.h>
struct device_node;
+struct gic_chip_data;
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
int gic_cpu_if_down(unsigned int gic_nr);
+void gic_cpu_save(struct gic_chip_data *gic);
+void gic_cpu_restore(struct gic_chip_data *gic);
+void gic_dist_save(struct gic_chip_data *gic);
+void gic_dist_restore(struct gic_chip_data *gic);
/*
* Subdrivers that need some preparatory work can initialize their
--
2.1.4
next prev parent reply other threads:[~2016-06-07 15:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-07 15:12 [PATCH V6 0/9] Add support for Tegra210 AGIC Jon Hunter
2016-06-07 15:12 ` [PATCH V6 1/9] irqdomain: Fix handling of type settings for existing mappings Jon Hunter
2016-06-07 15:12 ` [PATCH V6 2/9] genirq: Look-up trigger type if not specified by caller Jon Hunter
[not found] ` <1465312354-27778-3-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-13 10:42 ` Marc Zyngier
[not found] ` <575E8E29.3090808-5wv7dgnIgG8@public.gmane.org>
2016-06-13 11:09 ` Jon Hunter
[not found] ` <575E9457.8010100-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-13 11:59 ` Marc Zyngier
2016-06-13 12:24 ` Jon Hunter
[not found] ` <575EA603.7090002-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-13 12:33 ` Marc Zyngier
2016-06-07 15:12 ` [PATCH V6 3/9] irqdomain: Don't set type when mapping an IRQ Jon Hunter
[not found] ` <1465312354-27778-4-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-07-29 3:53 ` Masahiro Yamada
[not found] ` <CAK7LNASBpym341Yz57LPa5z81aLX0xmhEVvoY+q5zfiQkFSxwg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-29 8:10 ` Marc Zyngier
[not found] ` <579B0F6C.9070806-5wv7dgnIgG8@public.gmane.org>
2016-08-01 1:28 ` Masahiro Yamada
2016-08-01 7:46 ` Marc Zyngier
[not found] ` <579EFE6D.3050807-5wv7dgnIgG8@public.gmane.org>
2016-08-01 8:30 ` Masahiro Yamada
2016-07-29 8:31 ` Jon Hunter
[not found] ` <bdd8ed36-c2dc-6f73-d362-2cf47d128e6f-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-08-01 3:09 ` Masahiro Yamada
2017-08-17 12:46 ` [V6,3/9] " jeffy
2017-08-17 13:34 ` Marc Zyngier
[not found] ` <feb4e020-b738-9165-c044-b0e246ee4bd5-5wv7dgnIgG8@public.gmane.org>
2017-08-17 14:42 ` jeffy
[not found] ` <1465312354-27778-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-07 15:12 ` [PATCH V6 4/9] genirq: Add runtime power management support for IRQ chips Jon Hunter
[not found] ` <1465312354-27778-5-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-10 22:08 ` Kevin Hilman
2016-06-07 15:12 ` [PATCH V6 5/9] irqchip/gic: Isolate early GIC initialisation code Jon Hunter
2016-06-07 15:12 ` [PATCH V6 6/9] irqchip/gic: Add helper function for chip initialisation Jon Hunter
2016-06-07 15:12 ` Jon Hunter [this message]
2016-06-07 15:12 ` [PATCH V6 8/9] dt-bindings: arm-gic: Add documentation for Tegra210 AGIC Jon Hunter
2016-06-07 15:12 ` [PATCH V6 9/9] irqchip/gic: Add platform driver for non-root GICs that require RPM Jon Hunter
[not found] ` <1465312354-27778-10-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-13 9:10 ` Marc Zyngier
[not found] ` <575E789F.3050509-5wv7dgnIgG8@public.gmane.org>
2016-06-13 9:58 ` Jon Hunter
[not found] ` <575E83B8.2050602-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-13 10:13 ` Marc Zyngier
[not found] ` <575E8741.8060902-5wv7dgnIgG8@public.gmane.org>
2016-06-13 10:27 ` Jon Hunter
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