From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Lin Subject: [PATCH 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY Date: Wed, 8 Jun 2016 15:25:08 +0800 Message-ID: <1465370708-23619-1-git-send-email-shawn.lin@rock-chips.com> Return-path: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Kishon Vijay Abraham I Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Heiko Stuebner , Doug Anderson , Wenrui Li , Rob Herring , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Shawn Lin List-Id: devicetree@vger.kernel.org This patch adds a binding that describes the Rockchip PCIe PHY found on Rockchip SoCs PCIe interface. Signed-off-by: Shawn Lin --- .../devicetree/bindings/phy/rockchip-pcie-phy.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt new file mode 100644 index 0000000..ba8c406 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt @@ -0,0 +1,22 @@ +Rockchip PCIE PHY +----------------------- + +Required properties: + - compatible: rockchip,rk3399-pcie-phy + - #phy-cells: must be 0 + +Example: + +grf: syscon@ff770000 { + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + + ... + + pcie_phy: phy@e220 { + compatible = "rockchip,rk3399-pcie-phy"; + #phy-cells = <0>; + }; +}; + -- 2.3.7 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html