From mboxrd@z Thu Jan 1 00:00:00 1970 From: Juri Lelli Subject: [PATCH v7 3/8] arm, dts: add TC2 cpu capacity-dmips-mhz information Date: Mon, 5 Sep 2016 15:22:47 +0100 Message-ID: <1473085372-2840-4-git-send-email-juri.lelli@arm.com> References: <1473085372-2840-1-git-send-email-juri.lelli@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1473085372-2840-1-git-send-email-juri.lelli@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-kernel@vger.kernel.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, vincent.guittot@linaro.org, juri.lelli@arm.com, Pawel Moll , linux-pm@vger.kernel.org, peterz@infradead.org, catalin.marinas@arm.com, broonie@kernel.org, Ian Campbell , will.deacon@arm.com, dietmar.eggemann@arm.com, robh+dt@kernel.org, sudeep.holla@arm.com, linux@arm.linux.org.uk, Liviu Dudau , Kumar Gala , morten.rasmussen@arm.com, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Add TC2 cpu capacity information. Cc: Liviu Dudau Cc: Sudeep Holla Cc: Lorenzo Pieralisi Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: devicetree@vger.kernel.org Acked-by: Sudeep Holla Signed-off-by: Juri Lelli --- Changes from v1: - capacity-scale removed Changes from v4: - binding changed to capacity-dmips-mhz Changes from v6: - s/binding// in changelog --- arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 0205c97efdef..45d08cc37b01 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -39,6 +39,7 @@ reg = <0>; cci-control-port = <&cci_control1>; cpu-idle-states = <&CLUSTER_SLEEP_BIG>; + capacity-dmips-mhz = <1024>; }; cpu1: cpu@1 { @@ -47,6 +48,7 @@ reg = <1>; cci-control-port = <&cci_control1>; cpu-idle-states = <&CLUSTER_SLEEP_BIG>; + capacity-dmips-mhz = <1024>; }; cpu2: cpu@2 { @@ -55,6 +57,7 @@ reg = <0x100>; cci-control-port = <&cci_control2>; cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>; + capacity-dmips-mhz = <516>; }; cpu3: cpu@3 { @@ -63,6 +66,7 @@ reg = <0x101>; cci-control-port = <&cci_control2>; cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>; + capacity-dmips-mhz = <516>; }; cpu4: cpu@4 { @@ -71,6 +75,7 @@ reg = <0x102>; cci-control-port = <&cci_control2>; cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>; + capacity-dmips-mhz = <516>; }; idle-states { -- 2.7.0