From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Zhong Subject: [PATCH v2 2/2] arm64: dts: rk3399: add powerdomain for typec Date: Wed, 7 Sep 2016 16:06:17 -0700 Message-ID: <1473289577-14101-2-git-send-email-zyw@rock-chips.com> References: <1473289577-14101-1-git-send-email-zyw@rock-chips.com> Return-path: In-Reply-To: <1473289577-14101-1-git-send-email-zyw@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org To: kishon@ti.com, groeck@chromium.org, wulf@rock-chips.com, briannorris@chromium.org, heiko@sntech.de, dianders@chromium.org, kever.yang@rock-chips.com Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Chris Zhong , devicetree@vger.kernel.org, David Wu , Jianqun Xu , Masahiro Yamada , linux-kernel@vger.kernel.org, Will Deacon , Mark Rutland , Rob Herring , Catalin Marinas List-Id: devicetree@vger.kernel.org The tcpc power domain will try to power up/down the power of Type-C PHY. Hence, we need control it in Type-C PHY driver with the pm_runtime helper. Signed-off-by: Chris Zhong --- Changes in v2: None arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 8c51095..3eb52b3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1262,6 +1262,7 @@ clock-names = "tcpdcore", "tcpdphy-ref"; assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; assigned-clock-rates = <50000000>; + power-domains = <&power RK3399_PD_TCPD0>; resets = <&cru SRST_UPHY0>, <&cru SRST_UPHY0_PIPE_L00>, <&cru SRST_P_UPHY0_TCPHY>; @@ -1290,6 +1291,7 @@ clock-names = "tcpdcore", "tcpdphy-ref"; assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; assigned-clock-rates = <50000000>; + power-domains = <&power RK3399_PD_TCPD1>; resets = <&cru SRST_UPHY1>, <&cru SRST_UPHY1_PIPE_L00>, <&cru SRST_P_UPHY1_TCPHY>; -- 1.9.1