* [PATCH v3 1/3] of: Add vendor prefix for Engicam s.r.l company @ 2016-09-09 21:45 Jagan Teki 2016-09-09 21:45 ` [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support Jagan Teki 2016-09-09 21:45 ` [PATCH v3 3/3] ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo " Jagan Teki 0 siblings, 2 replies; 11+ messages in thread From: Jagan Teki @ 2016-09-09 21:45 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Jagan Teki, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi Engicam providing design services of electronic systems with high content of technology, relying on a long experience in electronic design. For more info visit http://www.engicam.com/en/ Cc: Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org> Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Matteo Lisi <matteo.lisi-4s7YQHO/iPVBDgjK7y7TUQ@public.gmane.org> Cc: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> --- Changes for v3: - Newly added patch Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 3003f33..327e4c7 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -85,6 +85,7 @@ elan Elan Microelectronic Corp. embest Shenzhen Embest Technology Co., Ltd. emmicro EM Microelectronic energymicro Silicon Laboratories (formerly Energy Micro AS) +engicam Engicam S.r.l. epcos EPCOS AG epfl Ecole Polytechnique Fédérale de Lausanne epson Seiko Epson Corp. -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support 2016-09-09 21:45 [PATCH v3 1/3] of: Add vendor prefix for Engicam s.r.l company Jagan Teki @ 2016-09-09 21:45 ` Jagan Teki [not found] ` <1473457525-27768-2-git-send-email-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> 2016-09-09 21:45 ` [PATCH v3 3/3] ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo " Jagan Teki 1 sibling, 1 reply; 11+ messages in thread From: Jagan Teki @ 2016-09-09 21:45 UTC (permalink / raw) To: linux-arm-kernel Cc: devicetree, linux-kernel, Jagan Teki, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - Use compatible as engicam,imx6-icore instead of fsl,imx6-icore - Update IOMUX value for can1 and can2 nodes - Added reg_3p3v for can1 and can2 nodes Changes for v2: - s/oaky/okay/g arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6q-icore.dts | 59 +++++++++++ arch/arm/boot/dts/imx6qdl-icore.dtsi | 197 +++++++++++++++++++++++++++++++++++ 3 files changed, 257 insertions(+) create mode 100644 arch/arm/boot/dts/imx6q-icore.dts create mode 100644 arch/arm/boot/dts/imx6qdl-icore.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f79cac2..511510d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -374,6 +374,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-gw553x.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ + imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6q-marsboard.dtb \ imx6q-nitrogen6x.dtb \ diff --git a/arch/arm/boot/dts/imx6q-icore.dts b/arch/arm/boot/dts/imx6q-icore.dts new file mode 100644 index 0000000..025f543 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-icore.dts @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-icore.dtsi" + +/ { + model = "Engicam i.CoreM6 Quad/Dual Starter Kit"; + compatible = "engicam,imx6-icore", "fsl,imx6q"; +}; + +&can1 { + status = "okay"; +}; + +&can2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi b/arch/arm/boot/dts/imx6qdl-icore.dtsi new file mode 100644 index 0000000..b99ee0b --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi @@ -0,0 +1,197 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + memory { + reg = <0x10000000 0x80000000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_3p3v>; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_3p3v>; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,legacy-bch-geometry; + nand-on-flash-bbt; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020 + >; + }; + + pinctrl_gpmi_nand: gpmi-nand { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17070 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070 + >; + }; +}; -- 2.7.4 ^ permalink raw reply related [flat|nested] 11+ messages in thread
[parent not found: <1473457525-27768-2-git-send-email-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>]
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support [not found] ` <1473457525-27768-2-git-send-email-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> @ 2016-09-09 21:59 ` Fabio Estevam 2016-09-09 22:03 ` Jagan Teki 0 siblings, 1 reply; 11+ messages in thread From: Fabio Estevam @ 2016-09-09 21:59 UTC (permalink / raw) To: Jagan Teki Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel, Jagan Teki, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Fri, Sep 9, 2016 at 6:45 PM, Jagan Teki <jagannadh.teki-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: > +&iomuxc { > + pinctrl_flexcan1: flexcan1grp { > + fsl,pins = < > + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 > + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 In the previous version you had "0x80000000", which means: use the pad value that comes from the bootloader. Does your bootloader configure the CAN pins? If not, then it should be 1b0b0, which is the POR value of register IOMUXC_SW_PAD_CTL_PAD_KEY_ROW2. To confirm, you can do this in your bootloader: => md.l 20E05DC 1 020e05dc: 0001b0b0 and see if returns 1b0b0 or 1b020. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support 2016-09-09 21:59 ` Fabio Estevam @ 2016-09-09 22:03 ` Jagan Teki 2016-09-09 22:14 ` Jagan Teki 0 siblings, 1 reply; 11+ messages in thread From: Jagan Teki @ 2016-09-09 22:03 UTC (permalink / raw) To: Fabio Estevam Cc: Jagan Teki, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Sat, Sep 10, 2016 at 3:29 AM, Fabio Estevam <festevam@gmail.com> wrote: > On Fri, Sep 9, 2016 at 6:45 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: > >> +&iomuxc { >> + pinctrl_flexcan1: flexcan1grp { >> + fsl,pins = < >> + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 >> + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 > > In the previous version you had "0x80000000", which means: use the pad > value that comes from the bootloader. > > Does your bootloader configure the CAN pins? If not, then it should be > 1b0b0, which is the POR value of register > IOMUXC_SW_PAD_CTL_PAD_KEY_ROW2. > > To confirm, you can do this in your bootloader: > > => md.l 20E05DC 1 > 020e05dc: 0001b0b0 > > and see if returns 1b0b0 or 1b020. Yeah, I got 1b0b0 U-Boot > md.l 20E05DC 1 020e05dc: 0001b0b0 thanks! -- Jagan Teki Free Software Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India. ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support 2016-09-09 22:03 ` Jagan Teki @ 2016-09-09 22:14 ` Jagan Teki [not found] ` <CAMty3ZAM-sZ0aZU0Z+8WhDcepx8KM96xUbn+n3UcDSjFTafC-A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 11+ messages in thread From: Jagan Teki @ 2016-09-09 22:14 UTC (permalink / raw) To: Fabio Estevam Cc: Jagan Teki, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Sat, Sep 10, 2016 at 3:33 AM, Jagan Teki <jagan@amarulasolutions.com> wrote: > On Sat, Sep 10, 2016 at 3:29 AM, Fabio Estevam <festevam@gmail.com> wrote: >> On Fri, Sep 9, 2016 at 6:45 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote: >> >>> +&iomuxc { >>> + pinctrl_flexcan1: flexcan1grp { >>> + fsl,pins = < >>> + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 >>> + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 >> >> In the previous version you had "0x80000000", which means: use the pad >> value that comes from the bootloader. >> >> Does your bootloader configure the CAN pins? If not, then it should be >> 1b0b0, which is the POR value of register >> IOMUXC_SW_PAD_CTL_PAD_KEY_ROW2. >> >> To confirm, you can do this in your bootloader: >> >> => md.l 20E05DC 1 >> 020e05dc: 0001b0b0 >> >> and see if returns 1b0b0 or 1b020. > > Yeah, I got 1b0b0 > > U-Boot > md.l 20E05DC 1 > 020e05dc: 0001b0b0 So I'm assigning change value to 1b020 Linux that's ok right? thanks! -- Jagan Teki Free Software Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India. ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <CAMty3ZAM-sZ0aZU0Z+8WhDcepx8KM96xUbn+n3UcDSjFTafC-A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support [not found] ` <CAMty3ZAM-sZ0aZU0Z+8WhDcepx8KM96xUbn+n3UcDSjFTafC-A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2016-09-09 22:19 ` Fabio Estevam [not found] ` <CAOMZO5AuZ5DqqKngLw67_-3PdoYx5pMNmm1ZHwRd79rYPJY-+Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 11+ messages in thread From: Fabio Estevam @ 2016-09-09 22:19 UTC (permalink / raw) To: Jagan Teki Cc: Jagan Teki, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Fri, Sep 9, 2016 at 7:14 PM, Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote: >> Yeah, I got 1b0b0 >> >> U-Boot > md.l 20E05DC 1 >> 020e05dc: 0001b0b0 > > So I'm assigning change value to 1b020 Linux that's ok right? Then just use 0x1b020 for the flexcan pins. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <CAOMZO5AuZ5DqqKngLw67_-3PdoYx5pMNmm1ZHwRd79rYPJY-+Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support [not found] ` <CAOMZO5AuZ5DqqKngLw67_-3PdoYx5pMNmm1ZHwRd79rYPJY-+Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2016-09-09 22:19 ` Fabio Estevam [not found] ` <CAOMZO5D2WNBh6fy8iFYasSZnovfBJRxzBt55ceaPqwCn3zvepg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 11+ messages in thread From: Fabio Estevam @ 2016-09-09 22:19 UTC (permalink / raw) To: Jagan Teki Cc: Jagan Teki, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Fri, Sep 9, 2016 at 7:19 PM, Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: > On Fri, Sep 9, 2016 at 7:14 PM, Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote: > >>> Yeah, I got 1b0b0 >>> >>> U-Boot > md.l 20E05DC 1 >>> 020e05dc: 0001b0b0 >> >> So I'm assigning change value to 1b020 Linux that's ok right? > > Then just use 0x1b020 for the flexcan pins. 1b0b0 I mean :-) -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <CAOMZO5D2WNBh6fy8iFYasSZnovfBJRxzBt55ceaPqwCn3zvepg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support [not found] ` <CAOMZO5D2WNBh6fy8iFYasSZnovfBJRxzBt55ceaPqwCn3zvepg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2016-09-09 22:21 ` Jagan Teki 2016-09-09 22:25 ` Fabio Estevam 0 siblings, 1 reply; 11+ messages in thread From: Jagan Teki @ 2016-09-09 22:21 UTC (permalink / raw) To: Fabio Estevam Cc: Jagan Teki, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Sat, Sep 10, 2016 at 3:49 AM, Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: > On Fri, Sep 9, 2016 at 7:19 PM, Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: >> On Fri, Sep 9, 2016 at 7:14 PM, Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote: >> >>>> Yeah, I got 1b0b0 >>>> >>>> U-Boot > md.l 20E05DC 1 >>>> 020e05dc: 0001b0b0 >>> >>> So I'm assigning change value to 1b020 Linux that's ok right? >> >> Then just use 0x1b020 for the flexcan pins. > > 1b0b0 I mean :-) Why? can't we update iomux reg value any side effects or something. thanks! -- Jagan Teki Free Software Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support 2016-09-09 22:21 ` Jagan Teki @ 2016-09-09 22:25 ` Fabio Estevam 2016-09-09 22:30 ` Jagan Teki 0 siblings, 1 reply; 11+ messages in thread From: Fabio Estevam @ 2016-09-09 22:25 UTC (permalink / raw) To: Jagan Teki Cc: Jagan Teki, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Fri, Sep 9, 2016 at 7:21 PM, Jagan Teki <jagan@amarulasolutions.com> wrote: > Why? can't we update iomux reg value any side effects or something. Sure you can change it. You were using 0x8000000 before and I assume you tested flexcan and it worked well. Putting 1b0b0 will keep the same setting, so no functional change. Why did you select 0x1b020? ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support 2016-09-09 22:25 ` Fabio Estevam @ 2016-09-09 22:30 ` Jagan Teki 0 siblings, 0 replies; 11+ messages in thread From: Jagan Teki @ 2016-09-09 22:30 UTC (permalink / raw) To: Fabio Estevam Cc: Jagan Teki, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi On Sat, Sep 10, 2016 at 3:55 AM, Fabio Estevam <festevam@gmail.com> wrote: > On Fri, Sep 9, 2016 at 7:21 PM, Jagan Teki <jagan@amarulasolutions.com> wrote: > >> Why? can't we update iomux reg value any side effects or something. > > Sure you can change it. > > You were using 0x8000000 before and I assume you tested flexcan and it > worked well. > > Putting 1b0b0 will keep the same setting, so no functional change. > > Why did you select 0x1b020? We are not using can on bootloader either and we always update the value in Linux which is 0x1b020 like for other imx6ul soc's as well. -- Jagan Teki Free Software Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India. ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 3/3] ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo initial support 2016-09-09 21:45 [PATCH v3 1/3] of: Add vendor prefix for Engicam s.r.l company Jagan Teki 2016-09-09 21:45 ` [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support Jagan Teki @ 2016-09-09 21:45 ` Jagan Teki 1 sibling, 0 replies; 11+ messages in thread From: Jagan Teki @ 2016-09-09 21:45 UTC (permalink / raw) To: linux-arm-kernel Cc: devicetree, linux-kernel, Jagan Teki, Sascha Hauer, Fabio Estevam, Shawn Guo, Matteo Lisi, Michael Trimarchi i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - Use compatible as engicam,imx6-icore instead of fsl,imx6-icore Changes for v2: - s/oaky/okay/g arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-icore.dts | 59 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-icore.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 511510d..6175f44 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -333,6 +333,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-gw552x.dtb \ imx6dl-gw553x.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-icore.dtb \ imx6dl-nit6xlite.dtb \ imx6dl-nitrogen6x.dtb \ imx6dl-phytec-pbab01.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-icore.dts b/arch/arm/boot/dts/imx6dl-icore.dts new file mode 100644 index 0000000..aec332c --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-icore.dts @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-icore.dtsi" + +/ { + model = "Engicam i.CoreM6 DualLite/Solo Starter Kit"; + compatible = "engicam,imx6-icore", "fsl,imx6dl"; +}; + +&can1 { + status = "okay"; +}; + +&can2 { + status = "okay"; +}; -- 2.7.4 ^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2016-09-09 22:30 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
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2016-09-09 21:45 [PATCH v3 1/3] of: Add vendor prefix for Engicam s.r.l company Jagan Teki
2016-09-09 21:45 ` [PATCH v3 2/3] ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support Jagan Teki
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2016-09-09 21:59 ` Fabio Estevam
2016-09-09 22:03 ` Jagan Teki
2016-09-09 22:14 ` Jagan Teki
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2016-09-09 22:19 ` Fabio Estevam
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2016-09-09 22:19 ` Fabio Estevam
[not found] ` <CAOMZO5D2WNBh6fy8iFYasSZnovfBJRxzBt55ceaPqwCn3zvepg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-09 22:21 ` Jagan Teki
2016-09-09 22:25 ` Fabio Estevam
2016-09-09 22:30 ` Jagan Teki
2016-09-09 21:45 ` [PATCH v3 3/3] ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo " Jagan Teki
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