From: Kishon Vijay Abraham I <kishon@ti.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Arnd Bergmann <arnd@arndb.de>, Jingoo Han <jingoohan1@gmail.com>,
hch@infradead.org, Joao.Pinto@synopsys.com, mingkai.hu@nxp.com,
m-karicheri2@ti.com, Pratyush Anand <pratyush.anand@gmail.com>
Cc: linux-pci@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Joao Pinto <jpinto@synopsys.com>,
Rob Herring <robh+dt@kernel.org>,
kishon@ti.com, nsekhar@ti.com
Subject: [RFC PATCH] ARM: dts: DRA7: Modify pcie1 dt node for EP mode
Date: Tue, 13 Sep 2016 22:40:52 +0530 [thread overview]
Message-ID: <1473786653-12759-11-git-send-email-kishon@ti.com> (raw)
In-Reply-To: <1473786653-12759-1-git-send-email-kishon@ti.com>
Modify pcie1 dt node in order for the controller to operate in
endpoint mode. This is used only for testing EP mode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 43 +++++++++++--------------------------------
1 file changed, 11 insertions(+), 32 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d9bfb94..73f63d1 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -283,38 +283,17 @@
};
};
- axi@0 {
- compatible = "simple-bus";
- #size-cells = <1>;
- #address-cells = <1>;
- ranges = <0x51000000 0x51000000 0x3000
- 0x0 0x20000000 0x10000000>;
- pcie1: pcie@51000000 {
- compatible = "ti,dra7-pcie";
- reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
- reg-names = "rc_dbics", "ti_conf", "config";
- interrupts = <0 232 0x4>, <0 233 0x4>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x03000 0 0x00010000
- 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
- #interrupt-cells = <1>;
- num-lanes = <1>;
- ti,hwmods = "pcie1";
- phys = <&pcie1_phy>;
- phy-names = "pcie-phy0";
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie1_intc 1>,
- <0 0 0 2 &pcie1_intc 2>,
- <0 0 0 3 &pcie1_intc 3>,
- <0 0 0 4 &pcie1_intc 4>;
- pcie1_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
+ pcie1: pcie@51000000 {
+ compatible = "ti,dra7-pcie-ep";
+ reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>;
+ reg-names = "ep_dbics", "ti_conf", "ep_dbics2";
+ interrupts = <0 232 0x4>;
+ num-lanes = <1>;
+ num-ib-windows = <4>;
+ num-ob-windows = <16>;
+ ti,hwmods = "pcie1";
+ phys = <&pcie1_phy>;
+ phy-names = "pcie-phy0";
};
axi@1 {
--
1.7.9.5
next prev parent reply other threads:[~2016-09-13 17:10 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-13 17:10 [RFC PATCH] pci: support for configurable PCI endpoint Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: endpoint: add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: endpoint: introduce configfs entry for configuring " Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] Documentation: PCI: guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: endpoint: functions: add an EP function to test PCI Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: rename *host* directory to *controller* Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: controller: designware: Add EP mode support Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] pci: controller: dra7xx: " Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] misc: add a new host side PCI endpoint test driver Kishon Vijay Abraham I
2016-09-13 17:10 ` Kishon Vijay Abraham I [this message]
[not found] ` <1473786653-12759-1-git-send-email-kishon-l0cyMroinI0@public.gmane.org>
2016-09-13 17:10 ` [RFC PATCH] pci: controller: split designware into *core* and *host* Kishon Vijay Abraham I
2016-09-13 17:10 ` [RFC PATCH] HACK: pci: controller: dra7xx: disable smart idle Kishon Vijay Abraham I
2016-09-14 5:06 ` [RFC PATCH] pci: support for configurable PCI endpoint Kishon Vijay Abraham I
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