From: Sinan Kaya <okaya@codeaurora.org>
To: dmaengine@vger.kernel.org, timur@codeaurora.org,
devicetree@vger.kernel.org, cov@codeaurora.org,
vinod.koul@intel.com, jcm@redhat.com
Cc: agross@codeaurora.org, arnd@arndb.de,
linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Sinan Kaya <okaya@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH V3 02/10] Documentation: DT: qcom_hidma: correct spelling mistakes
Date: Thu, 15 Sep 2016 13:22:38 -0400 [thread overview]
Message-ID: <1473960166-30155-3-git-send-email-okaya@codeaurora.org> (raw)
In-Reply-To: <1473960166-30155-1-git-send-email-okaya@codeaurora.org>
Fix the spelling mistakes and extra and statements in the sentences.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
index 47bfb5a..f99f642 100644
--- a/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
+++ b/Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
@@ -5,13 +5,13 @@ memcpy and memset capabilities. It has been designed for virtualized
environments.
Each HIDMA HW instance consists of multiple DMA channels. These channels
-share the same bandwidth. The bandwidth utilization can be parititioned
+share the same bandwidth. The bandwidth utilization can be partitioned
among channels based on the priority and weight assignments.
There are only two priority levels and 15 weigh assignments possible.
Other parameters here determine how much of the system bus this HIDMA
-instance can use like maximum read/write request and and number of bytes to
+instance can use like maximum read/write request and number of bytes to
read/write in a single burst.
Main node required properties:
--
1.9.1
next prev parent reply other threads:[~2016-09-15 17:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-15 17:22 [PATCH V3 00/10] dmaengine: qcom_hidma: add MSI interrupt support Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 01/10] Documentation: DT: qcom_hidma: update binding for MSI Sinan Kaya
2016-09-23 15:39 ` Rob Herring
2016-09-23 17:22 ` Sinan Kaya
[not found] ` <1473960166-30155-2-git-send-email-okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-09-23 18:02 ` Mark Rutland
2016-09-23 18:58 ` Sinan Kaya
2016-09-15 17:22 ` Sinan Kaya [this message]
2016-09-15 17:22 ` [PATCH V3 03/10] of: irq: make of_msi_configure accessible from modules Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 04/10] dmaengine: qcom_hidma: configure DMA and MSI for OF Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 06/10] dmaengine: qcom_hidma: make error and success path common Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 07/10] dmaengine: qcom_hidma: bring out interrupt cause Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 08/10] dmaengine: qcom_hidma: add a common API to setup the interrupt Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 09/10] dmaengine: qcom_hidma: protect common data structures Sinan Kaya
2016-09-15 17:22 ` [PATCH V3 10/10] dmaengine: qcom_hidma: add MSI support for interrupts Sinan Kaya
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