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* [PATCH v3] devicetree: bindings: uart: Add new compatible string for ZynqMP
@ 2016-09-22 11:20 Nava kishore Manne
  0 siblings, 0 replies; only message in thread
From: Nava kishore Manne @ 2016-09-22 11:20 UTC (permalink / raw)
  To: gregkh, robh+dt, mark.rutland, jslaby, michal.simek,
	soren.brinkmann, linux-serial, devicetree, linux-kernel,
	linux-arm-kernel, punnaia
  Cc: Nava kishore Manne, Nava kishore Manne

From: Nava kishore Manne <nava.manne@xilinx.com>

This patch Adds the new compatiable string for ZynqMP.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
---
Changes for v3:
		-Added changeLog comment.
Changes for v2:
                -None

 Documentation/devicetree/bindings/serial/cdns,uart.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt b/Documentation/devicetree/bindings/serial/cdns,uart.txt
index a3eb154..4fe7aae 100644
--- a/Documentation/devicetree/bindings/serial/cdns,uart.txt
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
@@ -1,7 +1,8 @@
 Binding for Cadence UART Controller
 
 Required properties:
-- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps"
+- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps" for Zynq and
+               "cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC uart controller.
 - reg: Should contain UART controller registers location and length.
 - interrupts: Should contain UART controller interrupts.
 - clocks: Must contain phandles to the UART clocks
-- 
2.1.2

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2016-09-22 11:20 [PATCH v3] devicetree: bindings: uart: Add new compatible string for ZynqMP Nava kishore Manne

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