From: Shawn Lin <shawn.lin@rock-chips.com>
To: Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
Wenrui Li <wenrui.li@rock-chips.com>,
Brian Norris <briannorris@chromium.org>,
devicetree@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>
Subject: [PATCH v8 1/3] Documentation/devicetree: Add new property to specify the max link speed
Date: Tue, 18 Oct 2016 09:45:08 +0800 [thread overview]
Message-ID: <1476755110-22647-1-git-send-email-shawn.lin@rock-chips.com> (raw)
Some of the host drivers have the requirement of knowing whether the
EP would never train at some link speed at all. For instance, on some
boards, the link won't train at 5 GT/s but the host driver still sacrifice
some cycle to wait for the resule of training at 5 GT/s as the host could
actually support 5 GT/s. So we could parse this new property and make the
host drivers be aware of these cases.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/pci/pci.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 08dcfad..e7d97a3 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -18,3 +18,9 @@ driver implementation may support the following properties:
host bridges in the system, otherwise potentially conflicting domain numbers
may be assigned to root buses behind different host bridges. The domain
number for each host bridge in the system must be unique.
+- max-link-speed:
+ If present this property specifies PCI gen for link capability. The host drivers
+ could add this as a strategy to avoid unnecessary operation for unsupported
+ link speed, for instance, trying to do training for unsupported link speed, etc.
+ Must be '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1. Any other
+ values are invalid.
--
2.3.7
next reply other threads:[~2016-10-18 1:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-18 1:45 Shawn Lin [this message]
[not found] ` <1476755110-22647-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-10-18 1:45 ` [PATCH v8 2/3] of/pci: Add helper function to parse max-link-speed from dt Shawn Lin
[not found] ` <1476755110-22647-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-10-25 0:17 ` Rob Herring
2016-10-18 1:45 ` [PATCH v8 3/3] PCI: rockchip: Specify the link capability Shawn Lin
2016-10-18 16:41 ` [PATCH v8 1/3] Documentation/devicetree: Add new property to specify the max link speed Rob Herring
2016-11-11 22:24 ` Bjorn Helgaas
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