From: Alexandre TORGUE <alexandre.torgue@st.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Patrice Chotard <patrice.chotard@st.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Rob Herring <robh+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: [PATCH 2/2] pinctrl: stm32: move gpio irqs binding to optional
Date: Thu, 20 Oct 2016 15:26:52 +0200 [thread overview]
Message-ID: <1476970012-7838-3-git-send-email-alexandre.torgue@st.com> (raw)
In-Reply-To: <1476970012-7838-1-git-send-email-alexandre.torgue@st.com>
stm32 pinctrl driver could be probed even if no interrupt controller
is defined to manage gpio irqs. Entries related to gpio irq management
are moved to optional.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index f9753c4..b24583a 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -14,11 +14,6 @@ Required properies:
- #size-cells : The value of this property must be 1
- ranges : defines mapping between pin controller node (parent) to
gpio-bank node (children).
- - interrupt-parent: phandle of the interrupt parent to which the external
- GPIO interrupts are forwarded to.
- - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
- which includes IRQ mux selection register, and the offset of the IRQ mux
- selection register.
- pins-are-numbered: Specify the subnodes are using numbered pinmux to
specify pins.
@@ -37,6 +32,11 @@ Required properties:
Optional properties:
- reset: : Reference to the reset controller
+ - interrupt-parent: phandle of the interrupt parent to which the external
+ GPIO interrupts are forwarded to.
+ - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
+ which includes IRQ mux selection register, and the offset of the IRQ mux
+ selection register.
Example:
#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
--
1.9.1
next prev parent reply other threads:[~2016-10-20 13:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-20 13:26 [PATCH 0/2] STM32 pinctrl: remove dependency between pinctrl driver and device tree Alexandre TORGUE
[not found] ` <1476970012-7838-1-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2016-10-20 13:26 ` [PATCH 1/2] pinctrl: stm32: remove dependency with interrupt controller Alexandre TORGUE
2016-10-23 23:55 ` Linus Walleij
2016-10-20 13:26 ` Alexandre TORGUE [this message]
2016-10-23 23:56 ` [PATCH 2/2] pinctrl: stm32: move gpio irqs binding to optional Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1476970012-7838-3-git-send-email-alexandre.torgue@st.com \
--to=alexandre.torgue@st.com \
--cc=devicetree@vger.kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mcoquelin.stm32@gmail.com \
--cc=patrice.chotard@st.com \
--cc=paul.gortmaker@windriver.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox