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From: Ritesh Harjani <riteshh@codeaurora.org>
To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
	adrian.hunter@intel.com, sboyd@codeaurora.org,
	andy.gross@linaro.org
Cc: shawn.lin@rock-chips.com, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, david.brown@linaro.org,
	linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
	alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
	Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
	david.griego@linaro.org, stummala@codeaurora.org,
	venkatg@codeaurora.org, rnayak@codeaurora.org,
	pramod.gurav@linaro.org, jeremymc@redhat.com,
	Ritesh Harjani <riteshh@codeaurora.org>
Subject: [PATCH v8 07/16] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback
Date: Wed, 16 Nov 2016 21:30:43 +0530	[thread overview]
Message-ID: <1479312052-22396-8-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1479312052-22396-1-git-send-email-riteshh@codeaurora.org>

This add get_min_clock() and get_max_clock() callback
for sdhci-msm. sdhci-msm min/max clocks may be different
hence implement these callbacks.

Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
---
 drivers/mmc/host/sdhci-msm.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 7e72105..518021d 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -68,6 +68,8 @@
 
 #define CORE_VENDOR_SPEC_CAPABILITIES0	0x11c
 
+#define SDHCI_MSM_MIN_CLOCK	400000
+
 #define CDR_SELEXT_SHIFT	20
 #define CDR_SELEXT_MASK		(0xf << CDR_SELEXT_SHIFT)
 #define CMUX_SHIFT_PHASE_SHIFT	24
@@ -556,6 +558,19 @@ static irqreturn_t sdhci_msm_pwr_irq(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static unsigned int sdhci_msm_get_max_clock(struct sdhci_host *host)
+{
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+
+	return clk_round_rate(msm_host->clk, ULONG_MAX);
+}
+
+static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host)
+{
+	return SDHCI_MSM_MIN_CLOCK;
+}
+
 static const struct of_device_id sdhci_msm_dt_match[] = {
 	{ .compatible = "qcom,sdhci-msm-v4" },
 	{},
@@ -567,6 +582,8 @@ static irqreturn_t sdhci_msm_pwr_irq(int irq, void *data)
 	.platform_execute_tuning = sdhci_msm_execute_tuning,
 	.reset = sdhci_reset,
 	.set_clock = sdhci_set_clock,
+	.get_min_clock = sdhci_msm_get_min_clock,
+	.get_max_clock = sdhci_msm_get_max_clock,
 	.set_bus_width = sdhci_set_bus_width,
 	.set_uhs_signaling = sdhci_msm_set_uhs_signaling,
 	.voltage_switch = sdhci_msm_voltage_switch,
-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
a Linux Foundation Collaborative Project.

  parent reply	other threads:[~2016-11-16 16:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 16:00 [PATCH v8 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 01/16] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 03/16] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 04/16] ARM: dts: Add xo_clock to sdhc nodes on qcom platforms Ritesh Harjani
2016-11-17  0:43   ` [PATCH v8 04/16] ARM: dts: Add xo to sdhc clock node " Ritesh Harjani
2016-11-18  3:56     ` Andy Gross
2016-11-21  6:30       ` Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 05/16] dt-bindings: sdhci-msm: Add xo_clock property Ritesh Harjani
2016-11-16 19:13   ` Stephen Boyd
2016-11-17  0:41     ` Ritesh Harjani
2016-11-17  0:47     ` [PATCH v8 05/16] dt-bindings: sdhci-msm: Add xo property Ritesh Harjani
2016-11-17 23:03       ` Stephen Boyd
     [not found]         ` <20161117230352.GO25626-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-21  6:31           ` Ritesh Harjani
     [not found]       ` <1479343623-31163-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-18 14:17         ` Rob Herring
2016-11-16 16:00 ` Ritesh Harjani [this message]
2016-11-16 16:00 ` [PATCH v8 11/16] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
     [not found] ` <1479312052-22396-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-16 16:00   ` [PATCH v8 02/16] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 06/16] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
     [not found]     ` <1479312052-22396-7-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-17  0:50       ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 08/16] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 09/16] mmc: sdhci: Factor out sdhci_enable_clock Ritesh Harjani
2016-11-18 13:56     ` Adrian Hunter
2016-11-21  6:31       ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 10/16] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-18 14:14     ` Adrian Hunter
2016-11-16 16:00   ` [PATCH v8 12/16] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-17  0:52     ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 13/16] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 16/16] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 14/16] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 15/16] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-11-17  0:08 ` [PATCH v8 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Jeremy McNicoll

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