From: Ritesh Harjani <riteshh@codeaurora.org>
To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
adrian.hunter@intel.com, sboyd@codeaurora.org,
andy.gross@linaro.org
Cc: shawn.lin@rock-chips.com, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, david.brown@linaro.org,
linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
david.griego@linaro.org, stummala@codeaurora.org,
venkatg@codeaurora.org, rnayak@codeaurora.org,
pramod.gurav@linaro.org, jeremymc@redhat.com,
Ritesh Harjani <riteshh@codeaurora.org>
Subject: [PATCH v9 09/16] mmc: sdhci: Factor out sdhci_enable_clk
Date: Mon, 21 Nov 2016 12:07:19 +0530 [thread overview]
Message-ID: <1479710246-26676-10-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1479710246-26676-1-git-send-email-riteshh@codeaurora.org>
Factor out sdhci_enable_clk from sdhci_set_clock
and make it EXPORT_SYMBOL so that it can be called.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
drivers/mmc/host/sdhci.c | 28 +++++++++++++++++-----------
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index d08d507..62aedf1 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1344,20 +1344,10 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
}
EXPORT_SYMBOL_GPL(sdhci_calc_clk);
-void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
{
- u16 clk;
unsigned long timeout;
- host->mmc->actual_clock = 0;
-
- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-
- if (clock == 0)
- return;
-
- clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
-
clk |= SDHCI_CLOCK_INT_EN;
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
@@ -1378,6 +1368,22 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
clk |= SDHCI_CLOCK_CARD_EN;
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
}
+EXPORT_SYMBOL_GPL(sdhci_enable_clk);
+
+void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+ u16 clk;
+
+ host->mmc->actual_clock = 0;
+
+ sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+ if (clock == 0)
+ return;
+
+ clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
+ sdhci_enable_clk(host, clk);
+}
EXPORT_SYMBOL_GPL(sdhci_set_clock);
static void sdhci_set_power_reg(struct sdhci_host *host, unsigned char mode,
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 9c35776..2fe9e80 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -682,6 +682,7 @@ static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host)
u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
unsigned int *actual_clock);
void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
+void sdhci_enable_clk(struct sdhci_host *host, u16 clk);
void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
unsigned short vdd);
void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2016-11-21 6:37 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-21 6:37 [PATCH v9 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 01/16] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
[not found] ` <1479710246-26676-2-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-23 19:00 ` Stephen Boyd
2016-11-21 6:37 ` [PATCH v9 02/16] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
2016-11-23 19:00 ` Stephen Boyd
2016-11-21 6:37 ` [PATCH v9 03/16] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 04/16] ARM: dts: Add xo to sdhc clock node on qcom platforms Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 05/16] dt-bindings: sdhci-msm: Add xo value Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 06/16] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 07/16] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
2017-04-26 21:44 ` Andy Gross
2017-04-27 7:58 ` Georgi Djakov
2016-11-21 6:37 ` [PATCH v9 08/16] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-21 6:37 ` Ritesh Harjani [this message]
[not found] ` <1479710246-26676-10-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-21 7:45 ` [PATCH v9 09/16] mmc: sdhci: Factor out sdhci_enable_clk Adrian Hunter
[not found] ` <1479710246-26676-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-21 6:37 ` [PATCH v9 10/16] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 13/16] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 16/16] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
2016-11-21 10:06 ` [PATCH v9 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ulf Hansson
2016-11-21 11:42 ` Ritesh Harjani
[not found] ` <d4d05fb9-8a9e-6cf2-dc63-0edbd27a9e55-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-21 23:11 ` Stephen Boyd
2016-11-23 0:05 ` Ritesh Harjani
[not found] ` <6dd874b4-8f60-471b-d1e7-089b4b035ad2-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-23 12:49 ` Ulf Hansson
2016-11-23 5:00 ` Andy Gross
2016-11-23 8:32 ` Ulf Hansson
2016-11-21 6:37 ` [PATCH v9 11/16] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 12/16] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 14/16] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-21 6:37 ` [PATCH v9 15/16] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
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