From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: [PATCH v2 2/2] ARM: dts: da850-lcdk: specify the maximum pixel clock rate for tilcdc Date: Mon, 28 Nov 2016 13:15:28 +0100 Message-ID: <1480335328-4010-3-git-send-email-bgolaszewski@baylibre.com> References: <1480335328-4010-1-git-send-email-bgolaszewski@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1480335328-4010-1-git-send-email-bgolaszewski@baylibre.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King Cc: linux-devicetree , LKML , linux-drm , Bartosz Golaszewski , Tomi Valkeinen , Jyri Sarha , arm-soc , Laurent Pinchart List-Id: devicetree@vger.kernel.org RHVlIHRvIG1lbW9yeSB0aHJvdWdocHV0IGNvbnN0cmFpbnRzIGFueSBkaXNwbGF5IG1vZGUgZm9y IHdoaWNoIHRoZQpwaXhlbCBjbG9jayByYXRlIGV4Y2VlZHMgdGhlIHJlY29tbWVuZGVkIHZhbHVl IG9mIDM3NTAwIEtIeiBtdXN0IGJlCmZpbHRlcmVkIG91dC4KClNwZWNpZnkgdGhlIG1heC1waXhl bGNsb2NrIHByb3BlcnR5IGZvciB0aGUgZGlzcGxheSBub2RlIGZvcgpkYTg1MC1sY2RrLgoKU2ln bmVkLW9mZi1ieTogQmFydG9zeiBHb2xhc3pld3NraSA8YmdvbGFzemV3c2tpQGJheWxpYnJlLmNv bT4KLS0tCiBhcmNoL2FybS9ib290L2R0cy9kYTg1MC1sY2RrLmR0cyB8IDEgKwogMSBmaWxlIGNo YW5nZWQsIDEgaW5zZXJ0aW9uKCspCgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vYm9vdC9kdHMvZGE4 NTAtbGNkay5kdHMgYi9hcmNoL2FybS9ib290L2R0cy9kYTg1MC1sY2RrLmR0cwppbmRleCBkODY0 ZjExLi4xMjgzMjYzIDEwMDY0NAotLS0gYS9hcmNoL2FybS9ib290L2R0cy9kYTg1MC1sY2RrLmR0 cworKysgYi9hcmNoL2FybS9ib290L2R0cy9kYTg1MC1sY2RrLmR0cwpAQCAtMjg1LDYgKzI4NSw3 IEBACiAKICZkaXNwbGF5IHsKIAlzdGF0dXMgPSAib2theSI7CisJbWF4LXBpeGVsY2xvY2sgPSA8 Mzc1MDA+OwogfTsKIAogJmRpc3BsYXlfb3V0IHsKLS0gCjIuOS4zCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRy aS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK