From mboxrd@z Thu Jan 1 00:00:00 1970 From: Baoyou Xie Subject: [PATCH 1/3] arm64: dts: zx: support cpu-freq for zx296718 Date: Thu, 1 Dec 2016 20:02:41 +0800 Message-ID: <1480593761-27139-1-git-send-email-baoyou.xie@linaro.org> Return-path: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, catalin.marinas-5wv7dgnIgG8@public.gmane.org, will.deacon-5wv7dgnIgG8@public.gmane.org, jun.nie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, baoyou.xie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, xie.baoyou-Th6q7B73Y6EnDS1+zs4M5A@public.gmane.org, chen.chaokai-Th6q7B73Y6EnDS1+zs4M5A@public.gmane.org, wang.qiang01-Th6q7B73Y6EnDS1+zs4M5A@public.gmane.org List-Id: devicetree@vger.kernel.org This patch adds the CPU clock phandle in CPU's node and uses operating-points-v2 to register operating points. So it can be used by cpufreq-dt driver. Signed-off-by: Baoyou Xie --- arch/arm64/boot/dts/zte/zx296718.dtsi | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi index 7a1aed7..16f7d5e 100644 --- a/arch/arm64/boot/dts/zte/zx296718.dtsi +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi @@ -44,6 +44,7 @@ #include #include #include +#include / { compatible = "zte,zx296718"; @@ -81,6 +82,8 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&topcrm A53_GATE>; + operating-points-v2 = <&cluster0_opp>; }; cpu1: cpu@1 { @@ -88,6 +91,7 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu2: cpu@2 { @@ -95,6 +99,7 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; }; cpu3: cpu@3 { @@ -102,6 +107,38 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + operating-points-v2 = <&cluster0_opp>; + }; + }; + + cluster0_opp: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <857000>; + clock-latency-ns = <500000>; + }; + opp@648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <857000>; + clock-latency-ns = <500000>; + }; + opp@800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <882000>; + clock-latency-ns = <500000>; + }; + opp@1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <892000>; + clock-latency-ns = <500000>; + }; + opp@1188000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1009000>; + clock-latency-ns = <500000>; }; }; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html