From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: [PATCH v7 5/5] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc Date: Tue, 13 Dec 2016 11:09:19 +0100 Message-ID: <1481623759-12786-6-git-send-email-bgolaszewski@baylibre.com> References: <1481623759-12786-1-git-send-email-bgolaszewski@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1481623759-12786-1-git-send-email-bgolaszewski@baylibre.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Laurent Pinchart , Peter Ujfalusi , Russell King , Maxime Ripard Cc: linux-devicetree , linux-drm , LKML , arm-soc , Bartosz Golaszewski List-Id: devicetree@vger.kernel.org QXQgbWF4aW11bSBDUFUgZnJlcXVlbmN5IG9mIDMwMCBNSHogdGhlIG1heGltdW0gcGl4ZWwgY2xv Y2sgZnJlcXVlbmN5CmlzIDM3LjUgTUh6WzFdLiBXZSBtdXN0IGZpbHRlciBvdXQgYW55IG1vZGUg Zm9yIHdoaWNoIHRoZSBjYWxjdWxhdGVkCnBpeGVsIGNsb2NrIHJhdGUgd291bGQgZXhjZWVkIHRo aXMgdmFsdWUuCgpTcGVjaWZ5IHRoZSBtYXgtcGl4ZWxjbG9jayBwcm9wZXJ0eSBmb3IgdGhlIGRp c3BsYXkgbm9kZSBmb3IKZGE4NTAtbGNkay4KClsxXSBodHRwOi8vcHJvY2Vzc29ycy53aWtpLnRp LmNvbS9pbmRleC5waHAvT01BUC1MMXgvQzY3NHgvQU0xeF9MQ0RfQ29udHJvbGxlcl8oTENEQylf VGhyb3VnaHB1dF9hbmRfT3B0aW1pemF0aW9uX1RlY2huaXF1ZXMKClNpZ25lZC1vZmYtYnk6IEJh cnRvc3ogR29sYXN6ZXdza2kgPGJnb2xhc3pld3NraUBiYXlsaWJyZS5jb20+Ci0tLQogYXJjaC9h cm0vYm9vdC9kdHMvZGE4NTAuZHRzaSB8IDEgKwogMSBmaWxlIGNoYW5nZWQsIDEgaW5zZXJ0aW9u KCspCgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vYm9vdC9kdHMvZGE4NTAuZHRzaSBiL2FyY2gvYXJt L2Jvb3QvZHRzL2RhODUwLmR0c2kKaW5kZXggNmIwZWYzZC4uNThiMTU2NiAxMDA2NDQKLS0tIGEv YXJjaC9hcm0vYm9vdC9kdHMvZGE4NTAuZHRzaQorKysgYi9hcmNoL2FybS9ib290L2R0cy9kYTg1 MC5kdHNpCkBAIC00NjIsNiArNDYyLDcgQEAKIAkJCWNvbXBhdGlibGUgPSAidGksZGE4NTAtdGls Y2RjIjsKIAkJCXJlZyA9IDwweDIxMzAwMCAweDEwMDA+OwogCQkJaW50ZXJydXB0cyA9IDw1Mj47 CisJCQltYXgtcGl4ZWxjbG9jayA9IDwzNzUwMD47CiAJCQlzdGF0dXMgPSAiZGlzYWJsZWQiOwog CQl9OwogCX07Ci0tIAoyLjkuMwoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRl c2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v ZHJpLWRldmVsCg==