From: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: [PATCH 12/12] ARM: dts: socfpga: add missing compatible string for SDRAM controller
Date: Wed, 4 Jan 2017 18:21:34 -0600 [thread overview]
Message-ID: <1483575694-29599-13-git-send-email-dinguyen@kernel.org> (raw)
In-Reply-To: <1483575694-29599-1-git-send-email-dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Add "altr,sdr-ctl" to the SDRAM controller node.
Signed-off-by: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
arch/arm/boot/dts/socfpga.dtsi | 2 +-
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index dccc281..bced4ca 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -782,7 +782,7 @@
};
sdr: sdr@ffc25000 {
- compatible = "syscon";
+ compatible = "altr,sdr-ctl", "syscon";
reg = <0xffc25000 0x1000>;
};
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index ee53951..074bf62 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -595,7 +595,7 @@
};
sdr: sdr@ffc25000 {
- compatible = "syscon";
+ compatible = "altr,sdr-ctl", "syscon";
reg = <0xffcfb100 0x80>;
};
--
2.7.4
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prev parent reply other threads:[~2017-01-05 0:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-05 0:21 [PATCH 00/12] ARM: dts: socfpga: enable a few hardware bits Dinh Nguyen
[not found] ` <1483575694-29599-1-git-send-email-dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-01-05 0:21 ` [PATCH 01/12] ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits Dinh Nguyen
2017-01-05 0:21 ` [PATCH 02/12] ARM: dts: socfpga: set desired i2c clock on " Dinh Nguyen
2017-01-05 0:21 ` [PATCH 03/12] ARM: dts: socfpga: Add Rohm DH2228FV DAC Dinh Nguyen
2017-01-05 0:21 ` [PATCH 04/12] ARM: dts: socfpga: enable CAN on Cyclone5 devkit Dinh Nguyen
2017-01-05 0:21 ` [PATCH 05/12] ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10 Dinh Nguyen
2017-01-05 0:21 ` [PATCH 06/12] ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit Dinh Nguyen
2017-01-05 0:21 ` [PATCH 07/12] ARM: dts: socfpga: add fpga-manager node for Arria10 Dinh Nguyen
2017-01-05 0:21 ` [PATCH 08/12] ARM: dts: socfpga: Add NAND device tree " Dinh Nguyen
2017-01-05 8:55 ` Steffen Trumtrar
2017-01-05 11:42 ` Dinh Nguyen
2017-01-05 0:21 ` [PATCH 09/12] ARM: dts: socfpga: fpga manager data is 32 bits Dinh Nguyen
2017-01-05 0:21 ` [PATCH 10/12] ARM: dts: socfpga: add base fpga region and fpga bridges Dinh Nguyen
2017-01-05 16:28 ` Alan Tull
[not found] ` <CANk1AXSbqohp73xHpp7e9-37d61ZB-dRAPAFc2eQGRYUnvB+0w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-05 16:34 ` Alan Tull
2017-01-06 7:39 ` Dinh Nguyen
2017-01-05 0:21 ` [PATCH 11/12] ARM: dts: socfpga: add fpga region support on Arria10 Dinh Nguyen
2017-01-05 0:21 ` Dinh Nguyen [this message]
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