From: <gabriel.fernandez@st.com>
To: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Russell King <linux@armlinux.org.uk>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Nicolas Pitre <nico@linaro.org>, Arnd Bergmann <arnd@arndb.de>,
daniel.thompson@linaro.org, andrea.merello@gmail.com,
radoslaw.pietrzyk@gmail.com
Cc: devicetree@vger.kernel.org, amelie.delaunay@st.com,
olivier.bideau@st.com, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
gabriel.fernandez@st.com, ludovic.barre@st.com
Subject: [PATCH v2 1/3] dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
Date: Mon, 9 Jan 2017 10:07:11 +0100 [thread overview]
Message-ID: <1483952833-14704-2-git-send-email-gabriel.fernandez@st.com> (raw)
In-Reply-To: <1483952833-14704-1-git-send-email-gabriel.fernandez@st.com>
From: Gabriel Fernandez <gabriel.fernandez@st.com>
Macro to select a clock was not correct.
Offset of enable register starts at 0x30, then calculation to select a bit is:
(@enable_reg - 0x30) / 4 * 32 + bit_to_select
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Tested-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
---
include/dt-bindings/mfd/stm32f4-rcc.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h
index e98942d..f662b19 100644
--- a/include/dt-bindings/mfd/stm32f4-rcc.h
+++ b/include/dt-bindings/mfd/stm32f4-rcc.h
@@ -25,7 +25,7 @@
#define STM32F4_RCC_AHB1_OTGHS 29
#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
-#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit + (0x30 * 8))
+#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
/* AHB2 */
@@ -36,13 +36,13 @@
#define STM32F4_RCC_AHB2_OTGFS 7
#define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
-#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + (0x34 * 8))
+#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20)
/* AHB3 */
#define STM32F4_RCC_AHB3_FMC 0
#define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
-#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + (0x38 * 8))
+#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40)
/* APB1 */
#define STM32F4_RCC_APB1_TIM2 0
@@ -72,7 +72,7 @@
#define STM32F4_RCC_APB1_UART8 31
#define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
-#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + (0x40 * 8))
+#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80)
/* APB2 */
#define STM32F4_RCC_APB2_TIM1 0
@@ -93,6 +93,6 @@
#define STM32F4_RCC_APB2_LTDC 26
#define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
-#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + (0x44 * 8))
+#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0)
#endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */
--
1.9.1
next prev parent reply other threads:[~2017-01-09 9:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-09 9:07 [PATCH v2 0/3] STM32F4 Clock binding fix & update gabriel.fernandez
2017-01-09 9:07 ` gabriel.fernandez [this message]
2017-01-21 0:34 ` [PATCH v2 1/3] dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro Stephen Boyd
2017-01-09 9:07 ` [PATCH v2 2/3] dt-bindings: mfd: stm32f4: Add missing binding definition gabriel.fernandez
2017-01-09 9:07 ` [PATCH v2 3/3] ARM: dts: stm32: Use clock DT binding definition on stm32f429 family gabriel.fernandez
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