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* [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
@ 2017-01-25  8:19 Scott Wood
  2017-01-27 22:38 ` Rob Herring
  0 siblings, 1 reply; 3+ messages in thread
From: Scott Wood @ 2017-01-25  8:19 UTC (permalink / raw)
  To: Michael Turquette, Stephen Boyd, Shawn Guo
  Cc: linux-clk, linux-arm-kernel, Y.B. Lu, Z.Q. Hou, Y.T. Tang,
	Scott Wood, devicetree

ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.

Update the qoriq-clock binding to allow a second input clock, named
"coreclk".  If present, this clock will be used for the core PLLs.

Signed-off-by: Scott Wood <oss@buserror.net>
Cc: devicetree@vger.kernel.org
---
 Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index df9cb5a..97a9666 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -55,6 +55,11 @@ Optional properties:
 - clocks: If clock-frequency is not specified, sysclk may be provided
 	as an input clock.  Either clock-frequency or clocks must be
 	provided.
+	A second input clock, called "coreclk", may be provided if
+	core PLLs are based on a different input clock from the
+	platform PLL.
+- clock-names: Required if a coreclk is present.  Valid names are
+	"sysclk" and "coreclk".
 
 2. Clock Provider
 
@@ -71,6 +76,7 @@ second cell is the clock index for the specified type.
 	2	hwaccel		index (n in CLKCGnHWACSR)
 	3	fman		0 for fm1, 1 for fm2
 	4	platform pll	0=pll, 1=pll/2, 2=pll/3, 3=pll/4
+	5	coreclk		must be 0
 
 3. Example
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
  2017-01-25  8:19 [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Scott Wood
@ 2017-01-27 22:38 ` Rob Herring
  2017-01-27 23:51   ` Scott Wood
  0 siblings, 1 reply; 3+ messages in thread
From: Rob Herring @ 2017-01-27 22:38 UTC (permalink / raw)
  To: Scott Wood
  Cc: Michael Turquette, Stephen Boyd, Shawn Guo, linux-clk,
	linux-arm-kernel, Y.B. Lu, Z.Q. Hou, Y.T. Tang, devicetree

On Wed, Jan 25, 2017 at 02:19:21AM -0600, Scott Wood wrote:
> ls1012a has separate input root clocks for core PLLs versus the platform
> PLL, with the latter described as sysclk in the hw docs.
> 
> Update the qoriq-clock binding to allow a second input clock, named
> "coreclk".  If present, this clock will be used for the core PLLs.
> 
> Signed-off-by: Scott Wood <oss@buserror.net>
> Cc: devicetree@vger.kernel.org
> ---
>  Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index df9cb5a..97a9666 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -55,6 +55,11 @@ Optional properties:
>  - clocks: If clock-frequency is not specified, sysclk may be provided
>  	as an input clock.  Either clock-frequency or clocks must be
>  	provided.
> +	A second input clock, called "coreclk", may be provided if
> +	core PLLs are based on a different input clock from the
> +	platform PLL.
> +- clock-names: Required if a coreclk is present.  Valid names are
> +	"sysclk" and "coreclk".

'clk' part is redundant.

>  
>  2. Clock Provider
>  
> @@ -71,6 +76,7 @@ second cell is the clock index for the specified type.
>  	2	hwaccel		index (n in CLKCGnHWACSR)
>  	3	fman		0 for fm1, 1 for fm2
>  	4	platform pll	0=pll, 1=pll/2, 2=pll/3, 3=pll/4
> +	5	coreclk		must be 0
>  
>  3. Example
>  
> -- 
> 2.7.4
> 
> --
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
  2017-01-27 22:38 ` Rob Herring
@ 2017-01-27 23:51   ` Scott Wood
  0 siblings, 0 replies; 3+ messages in thread
From: Scott Wood @ 2017-01-27 23:51 UTC (permalink / raw)
  To: Rob Herring
  Cc: devicetree, Z.Q. Hou, Michael Turquette, Stephen Boyd, Y.T. Tang,
	Y.B. Lu, Shawn Guo, linux-clk, linux-arm-kernel

On Fri, 2017-01-27 at 16:38 -0600, Rob Herring wrote:
> On Wed, Jan 25, 2017 at 02:19:21AM -0600, Scott Wood wrote:
> > 
> > ls1012a has separate input root clocks for core PLLs versus the platform
> > PLL, with the latter described as sysclk in the hw docs.
> > 
> > Update the qoriq-clock binding to allow a second input clock, named
> > "coreclk".  If present, this clock will be used for the core PLLs.
> > 
> > Signed-off-by: Scott Wood <oss@buserror.net>
> > Cc: devicetree@vger.kernel.org
> > ---
> >  Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > index df9cb5a..97a9666 100644
> > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > @@ -55,6 +55,11 @@ Optional properties:
> >  - clocks: If clock-frequency is not specified, sysclk may be provided
> >  	as an input clock.  Either clock-frequency or clocks must be
> >  	provided.
> > +	A second input clock, called "coreclk", may be provided if
> > +	core PLLs are based on a different input clock from the
> > +	platform PLL.
> > +- clock-names: Required if a coreclk is present.  Valid names are
> > +	"sysclk" and "coreclk".
> 'clk' part is redundant.

"sysclk" is a term used by the hardware documentation and I'd rather leave it
intact.  "coreclk" isn't named (only described) by the hardware documentation
but it is a special variant of sysclk and having similar naming helps make
that clear.

-Scott


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2017-01-25  8:19 [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Scott Wood
2017-01-27 22:38 ` Rob Herring
2017-01-27 23:51   ` Scott Wood

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