From: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
To: Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>,
Patrick Titiano
<ptitiano-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
Cc: linux-ide-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Bartosz Golaszewski
<bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Subject: [PATCH v7 11/14] sata: ahci-da850: un-hardcode the MPY bits
Date: Mon, 30 Jan 2017 11:02:08 +0100 [thread overview]
Message-ID: <1485770531-6772-12-git-send-email-bgolaszewski@baylibre.com> (raw)
In-Reply-To: <1485770531-6772-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
All platforms using this driver now register the SATA refclk. Remove
the hardcoded default value from the driver and instead read the rate
of the external clock and calculate the required MPY value from it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Acked-by: Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
drivers/ata/ahci_da850.c | 91 ++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 76 insertions(+), 15 deletions(-)
diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index d65088a..44bb795 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c
@@ -29,17 +29,8 @@
#define SATA_PHY_TXSWING(x) ((x) << 19)
#define SATA_PHY_ENPLL(x) ((x) << 31)
-/*
- * The multiplier needed for 1.5GHz PLL output.
- *
- * NOTE: This is currently hardcoded to be suitable for 100MHz crystal
- * frequency (which is used by DA850 EVM board) and may need to be changed
- * if you would like to use this driver on some other board.
- */
-#define DA850_SATA_CLK_MULTIPLIER 7
-
static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
- void __iomem *ahci_base)
+ void __iomem *ahci_base, u32 mpy)
{
unsigned int val;
@@ -48,13 +39,61 @@ static void da850_sata_init(struct device *dev, void __iomem *pwrdn_reg,
val &= ~BIT(0);
writel(val, pwrdn_reg);
- val = SATA_PHY_MPY(DA850_SATA_CLK_MULTIPLIER + 1) | SATA_PHY_LOS(1) |
- SATA_PHY_RXCDR(4) | SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) |
- SATA_PHY_ENPLL(1);
+ val = SATA_PHY_MPY(mpy) | SATA_PHY_LOS(1) | SATA_PHY_RXCDR(4) |
+ SATA_PHY_RXEQ(1) | SATA_PHY_TXSWING(3) | SATA_PHY_ENPLL(1);
writel(val, ahci_base + SATA_P0PHYCR_REG);
}
+static u32 ahci_da850_calculate_mpy(unsigned long refclk_rate)
+{
+ u32 pll_output = 1500000000, needed;
+
+ /*
+ * We need to determine the value of the multiplier (MPY) bits.
+ * In order to include the 12.5 multiplier we need to first divide
+ * the refclk rate by ten.
+ *
+ * __div64_32() turned out to be unreliable, sometimes returning
+ * false results.
+ */
+ WARN((refclk_rate % 10) != 0, "refclk must be divisible by 10");
+ needed = pll_output / (refclk_rate / 10);
+
+ /*
+ * What we have now is (multiplier * 10).
+ *
+ * Let's determine the actual register value we need to write.
+ */
+
+ switch (needed) {
+ case 50:
+ return 0x1;
+ case 60:
+ return 0x2;
+ case 80:
+ return 0x4;
+ case 100:
+ return 0x5;
+ case 120:
+ return 0x6;
+ case 125:
+ return 0x7;
+ case 150:
+ return 0x8;
+ case 200:
+ return 0x9;
+ case 250:
+ return 0xa;
+ default:
+ /*
+ * We should have divided evenly - if not, return an invalid
+ * value.
+ */
+ return 0;
+ }
+}
+
static int ahci_da850_softreset(struct ata_link *link,
unsigned int *class, unsigned long deadline)
{
@@ -126,9 +165,10 @@ static int ahci_da850_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct ahci_host_priv *hpriv;
- struct resource *res;
void __iomem *pwrdn_reg;
+ struct resource *res;
struct clk *clk;
+ u32 mpy;
int rc;
hpriv = ahci_platform_get_resources(pdev);
@@ -150,6 +190,27 @@ static int ahci_da850_probe(struct platform_device *pdev)
hpriv->clks[0] = clk;
}
+ /*
+ * The second clock used by ahci-da850 is the external REFCLK. If we
+ * didn't get it from ahci_platform_get_resources(), let's try to
+ * specify the con_id in clk_get().
+ */
+ if (!hpriv->clks[1]) {
+ clk = clk_get(dev, "refclk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "unable to obtain the reference clock");
+ return -ENODEV;
+ } else {
+ hpriv->clks[1] = clk;
+ }
+ }
+
+ mpy = ahci_da850_calculate_mpy(clk_get_rate(hpriv->clks[1]));
+ if (mpy == 0) {
+ dev_err(dev, "invalid REFCLK multiplier value: 0x%x", mpy);
+ return -EINVAL;
+ }
+
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
@@ -162,7 +223,7 @@ static int ahci_da850_probe(struct platform_device *pdev)
if (!pwrdn_reg)
goto disable_resources;
- da850_sata_init(dev, pwrdn_reg, hpriv->mmio);
+ da850_sata_init(dev, pwrdn_reg, hpriv->mmio, mpy);
rc = ahci_platform_init_host(pdev, hpriv, &ahci_da850_port_info,
&ahci_platform_sht);
--
2.9.3
--
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next prev parent reply other threads:[~2017-01-30 10:02 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-30 10:01 [PATCH v7 00/14] ARM: da850-lcdk: add SATA support Bartosz Golaszewski
2017-01-30 10:01 ` [PATCH v7 01/14] devicetree: bindings: add bindings for ahci-da850 Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 03/14] ARM: davinci: add a clock lookup entry for the SATA clock Bartosz Golaszewski
2017-01-31 15:09 ` Sekhar Nori
2017-01-30 10:02 ` [PATCH v7 06/14] ARM: davinci: da850: model the SATA refclk Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 07/14] sata: ahci-da850: add device tree match table Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 08/14] sata: ahci-da850: implement a workaround for the softreset quirk Bartosz Golaszewski
[not found] ` <1485770531-6772-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-01-30 10:01 ` [PATCH v7 02/14] ARM: davinci_all_defconfig: enable SATA modules Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 04/14] sata: ahci-da850: get the sata clock using a connection id Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 05/14] ARM: davinci: da850: add con_id for the SATA clock Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 09/14] sata: ahci: export ahci_do_hardreset() locally Bartosz Golaszewski
2017-01-30 10:02 ` Bartosz Golaszewski [this message]
[not found] ` <1485770531-6772-12-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2017-01-31 15:13 ` [PATCH v7 11/14] sata: ahci-da850: un-hardcode the MPY bits Sekhar Nori
2017-01-30 10:02 ` [PATCH v7 13/14] ARM: dts: da850: add the SATA node Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 10/14] sata: ahci-da850: add a workaround for controller instability Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 12/14] ARM: davinci: remove BUG_ON() from da850_register_sata() Bartosz Golaszewski
2017-01-30 10:02 ` [PATCH v7 14/14] ARM: dts: da850-lcdk: enable the SATA node Bartosz Golaszewski
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