* [PATCH] ARM: dts: Add EMAC AXI settings for Arria10
@ 2017-02-02 17:09 thor.thayer-VuQAYsv1563Yd54FQh9/CA
2017-02-02 19:20 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: thor.thayer-VuQAYsv1563Yd54FQh9/CA @ 2017-02-02 17:09 UTC (permalink / raw)
To: dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx,
dinh.nguyen-VuQAYsv1563Yd54FQh9/CA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
linux-I+IVW8TIWO2tmTQ+vhA3Yw
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
thor.thayer-VuQAYsv1563Yd54FQh9/CA
From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.
Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index f520cbf..f05dd15 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -400,6 +400,12 @@
};
};
+ socfpga_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <0xf>;
+ snps,rd_osr_lmt = <0xf>;
+ snps,blen = <0 0 0 0 16 0 0>;
+ };
+
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
@@ -416,6 +422,7 @@
clock-names = "stmmaceth";
resets = <&rst EMAC0_RESET>;
reset-names = "stmmaceth";
+ snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ARM: dts: Add EMAC AXI settings for Arria10
2017-02-02 17:09 [PATCH] ARM: dts: Add EMAC AXI settings for Arria10 thor.thayer-VuQAYsv1563Yd54FQh9/CA
@ 2017-02-02 19:20 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2017-02-02 19:20 UTC (permalink / raw)
To: thor.thayer
Cc: Dinh Nguyen, dinh.nguyen, Rob Herring, Mark Rutland, Russell King,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Linux List
On Thu, Feb 2, 2017 at 11:09 AM, <thor.thayer@linux.intel.com> wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
>
> Add the device tree entries needed to support the EMAC AXI
> bus settings on the Arria10 SoCFPGA chip.
>
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---
> arch/arm/boot/dts/socfpga_arria10.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
> index f520cbf..f05dd15 100644
> --- a/arch/arm/boot/dts/socfpga_arria10.dtsi
> +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
> @@ -400,6 +400,12 @@
> };
> };
>
> + socfpga_axi_setup: stmmac-axi-config {
> + snps,wr_osr_lmt = <0xf>;
> + snps,rd_osr_lmt = <0xf>;
> + snps,blen = <0 0 0 0 16 0 0>;
> + };
> +
> gmac0: ethernet@ff800000 {
> compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
> altr,sysmgr-syscon = <&sysmgr 0x44 0>;
> @@ -416,6 +422,7 @@
> clock-names = "stmmaceth";
> resets = <&rst EMAC0_RESET>;
> reset-names = "stmmaceth";
> + snps,axi-config = <&socfpga_axi_setup>;
What about gmac1 and gmac2? They probably need this entry as well.
Dinh
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2017-02-02 19:20 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-02-02 17:09 [PATCH] ARM: dts: Add EMAC AXI settings for Arria10 thor.thayer-VuQAYsv1563Yd54FQh9/CA
2017-02-02 19:20 ` Dinh Nguyen
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).