* [PATCHv2] ARM: dts: Add EMAC AXI settings for Arria10
@ 2017-02-02 22:05 thor.thayer-VuQAYsv1563Yd54FQh9/CA
[not found] ` <1486073121-3364-1-git-send-email-thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
0 siblings, 1 reply; 2+ messages in thread
From: thor.thayer-VuQAYsv1563Yd54FQh9/CA @ 2017-02-02 22:05 UTC (permalink / raw)
To: dinh.linux-Re5JQEeQqe8AvxtiuMwx3w,
dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx,
dinh.nguyen-VuQAYsv1563Yd54FQh9/CA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
linux-I+IVW8TIWO2tmTQ+vhA3Yw
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
matthew.gerlach-VuQAYsv1563Yd54FQh9/CA,
thor.thayer-VuQAYsv1563Yd54FQh9/CA
From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.
Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
v2 Add the AXI configuration to the other DW EMACs in the chip.
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index f520cbf..9abc7d8 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -400,6 +400,12 @@
};
};
+ socfpga_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <0xf>;
+ snps,rd_osr_lmt = <0xf>;
+ snps,blen = <0 0 0 0 16 0 0>;
+ };
+
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
@@ -416,6 +422,7 @@
clock-names = "stmmaceth";
resets = <&rst EMAC0_RESET>;
reset-names = "stmmaceth";
+ snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
@@ -435,6 +442,7 @@
clock-names = "stmmaceth";
resets = <&rst EMAC1_RESET>;
reset-names = "stmmaceth";
+ snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
@@ -452,6 +460,7 @@
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
clock-names = "stmmaceth";
+ snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
--
2.7.4
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* Re: [PATCHv2] ARM: dts: Add EMAC AXI settings for Arria10
[not found] ` <1486073121-3364-1-git-send-email-thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
@ 2017-02-03 3:46 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2017-02-03 3:46 UTC (permalink / raw)
To: thor.thayer-VuQAYsv1563Yd54FQh9/CA
Cc: Dinh Nguyen, dinh.nguyen-VuQAYsv1563Yd54FQh9/CA, Rob Herring,
Mark Rutland, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Linux List, matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
On Thu, Feb 2, 2017 at 4:05 PM, <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:
> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>
> Add the device tree entries needed to support the EMAC AXI
> bus settings on the Arria10 SoCFPGA chip.
>
> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> v2 Add the AXI configuration to the other DW EMACs in the chip.
> ---
> arch/arm/boot/dts/socfpga_arria10.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
Applied!
Thanks,
Dinh
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2017-02-02 22:05 [PATCHv2] ARM: dts: Add EMAC AXI settings for Arria10 thor.thayer-VuQAYsv1563Yd54FQh9/CA
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2017-02-03 3:46 ` Dinh Nguyen
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