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From: matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org
To: atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org,
	moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org,
	linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org
Subject: [PATCH 1/4] fpga: add config complete timeout
Date: Wed, 15 Feb 2017 13:10:35 -0800	[thread overview]
Message-ID: <1487193038-3490-2-git-send-email-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <1487193038-3490-1-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>

From: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Adding timeout for maximum allowed time for FPGA to go to
operating mode after a FPGA region has been programmed.

Signed-off-by: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
 drivers/fpga/fpga-region.c    | 3 +++
 include/linux/fpga/fpga-mgr.h | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 3222fdb..28401cb 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -381,6 +381,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
 	of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
 			     &info->disable_timeout_us);
 
+	of_property_read_u32(nd->overlay, "config-complete-timeout-us",
+			     &info->config_complete_timeout_us);
+
 	/* If FPGA was externally programmed, don't specify firmware */
 	if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
 		pr_err("error: specified firmware and external-fpga-config");
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 57beb5d..fd3f083 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -76,11 +76,14 @@ enum fpga_mgr_states {
  * @flags: boolean flags as defined above
  * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
  * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ *	   status in the write_complete op.
  */
 struct fpga_image_info {
 	u32 flags;
 	u32 enable_timeout_us;
 	u32 disable_timeout_us;
+	u32 config_complete_timeout_us;
 };
 
 /**
-- 
2.7.4

--
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  parent reply	other threads:[~2017-02-15 21:10 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-15 21:10 [PATCH 0/4] Altera Partial Reconfiguration IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-02-15 21:10 ` [PATCH 2/4] fpga pr ip: Core driver support for " matthew.gerlach
     [not found]   ` <1487193038-3490-3-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-02-16 17:35     ` Moritz Fischer
2017-02-16 22:47       ` matthew.gerlach
     [not found] ` <1487193038-3490-1-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-02-15 21:10   ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA [this message]
2017-02-15 21:10   ` [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
     [not found]     ` <1487193038-3490-4-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-02-17 13:31       ` Dinh Nguyen
2017-02-17 15:20         ` Moritz Fischer
2017-02-27 14:32     ` Rob Herring
2017-02-27 16:27       ` matthew.gerlach
2017-02-15 21:10 ` [PATCH 4/4] fpga pr ip: Platform driver for Altera Partial Reconfiguration IP matthew.gerlach
2017-02-26 22:51   ` kbuild test robot

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