From mboxrd@z Thu Jan 1 00:00:00 1970 From: Long Cheng Subject: [PATCH 1/4] dt-bindings: dma: uart: add uart dma bindings Date: Thu, 16 Feb 2017 19:07:28 +0800 Message-ID: <1487243251-964-2-git-send-email-long.cheng@mediatek.com> References: <1487243251-964-1-git-send-email-long.cheng@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1487243251-964-1-git-send-email-long.cheng@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Vinod Koul , Rob Herring , Mark Rutland , Matthias Brugger , Russell King , Dan Williams , Greg Kroah-Hartman , Jiri Slaby Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, srv_heupstream@mediatek.com, Long Cheng List-Id: devicetree@vger.kernel.org add uart dma bindings Signed-off-by: Long Cheng --- .../devicetree/bindings/dma/mtk_uart_dma.txt | 32 ++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/mtk_uart_dma.txt diff --git a/Documentation/devicetree/bindings/dma/mtk_uart_dma.txt b/Documentation/devicetree/bindings/dma/mtk_uart_dma.txt new file mode 100644 index 0000000..b8aa7f4 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mtk_uart_dma.txt @@ -0,0 +1,32 @@ +* Mediatek UART APDMA Controller + +Required properties: +- compatible should contain: + * "mediatek,mt2701-uart-dma" for MT2701 compatible APDMA + * "mediatek,mt6577-uart-dma" for MT6577 and all of the above + +- reg: The base address of the APDMA register bank. + +- interrupts: A single interrupt specifier. + +- clocks : Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: The APDMA clock for register accesses + +Examples: + + apdma: dma-controller@11000380 { + compatible = "mediatek,mt2701-uart-dma"; + reg = <0 0x11000380 0 0x400>; + interrupts = , + , + , + , + , + , + , + ; + clocks = <&pericfg CLK_PERI_AP_DMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; -- 1.7.9.5