From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rhyland Klein <rklein@nvidia.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH 3/7] clk: tegra: correct afi parent
Date: Wed, 22 Feb 2017 17:13:58 +0200 [thread overview]
Message-ID: <1487776444-4701-4-git-send-email-pdeschrijver@nvidia.com> (raw)
In-Reply-To: <1487776444-4701-1-git-send-email-pdeschrijver@nvidia.com>
The parent for afi is actually mselect, not clk_m.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-tegra-periph.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 19b00b7..c9e795b 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -815,7 +815,7 @@
GATE("usb2", "clk_m", 58, 0, tegra_clk_usb2, 0),
GATE("usb3", "clk_m", 59, 0, tegra_clk_usb3, 0),
GATE("csi", "pll_p_out3", 52, 0, tegra_clk_csi, 0),
- GATE("afi", "clk_m", 72, 0, tegra_clk_afi, 0),
+ GATE("afi", "mselect", 72, 0, tegra_clk_afi, 0),
GATE("csus", "clk_m", 92, TEGRA_PERIPH_NO_RESET, tegra_clk_csus, 0),
GATE("dds", "clk_m", 150, TEGRA_PERIPH_ON_APB, tegra_clk_dds, 0),
GATE("dp2", "clk_m", 152, TEGRA_PERIPH_ON_APB, tegra_clk_dp2, 0),
--
1.9.1
next prev parent reply other threads:[~2017-02-22 15:13 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-22 15:13 [PATCH 0/7] Tegra210 clock bug fixes Peter De Schrijver
2017-02-22 15:13 ` [PATCH 2/7] clk: tegra: fix isp clock modelling Peter De Schrijver
2017-02-23 7:49 ` Mikko Perttunen
2017-02-22 15:13 ` Peter De Schrijver [this message]
[not found] ` <1487776444-4701-4-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-02-23 9:01 ` [PATCH 3/7] clk: tegra: correct afi parent Mikko Perttunen
2017-02-22 15:13 ` [PATCH 4/7] clk: tegra: remove non-existing pll_m_out1 clock Peter De Schrijver
[not found] ` <1487776444-4701-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-02-22 16:31 ` Mikko Perttunen
2017-02-23 8:17 ` Mikko Perttunen
[not found] ` <3be69e34-354c-81ea-0c5e-182a79aa42d0-/1wQRMveznE@public.gmane.org>
2017-02-23 8:17 ` Mikko Perttunen
[not found] ` <1487776444-4701-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-02-22 15:13 ` [PATCH 1/7] clk: tegra: fix pll_a1 iddq register, add pll_a1 Peter De Schrijver
[not found] ` <1487776444-4701-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-02-22 16:38 ` Mikko Perttunen
2017-02-22 15:14 ` [PATCH 5/7] clk: tegra: don't warn for PLL defaults unnecessarily Peter De Schrijver
2017-02-23 9:06 ` Mikko Perttunen
2017-02-22 15:14 ` [PATCH 6/7] clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation Peter De Schrijver
[not found] ` <1487776444-4701-7-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-02-23 9:18 ` Mikko Perttunen
2017-02-22 15:14 ` [PATCH 7/7] clk: tegra: fix type for m field Peter De Schrijver
2017-02-23 9:18 ` Mikko Perttunen
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