[PATCH 0/2] ARM: dts: bcm5301x: Add TWD and I2C

[PATCH 0/2] ARM: dts: bcm5301x: Add TWD and I2C

[Jon Mason]

These seemed to have been lost sometime last year.  See
https://lkml.org/lkml/2016/5/11/953

I am dropping the syscon reboot from the series, as I believe that was
the sticking point, and resending the TWD and i2c patches.

Jon Mason (2):
  ARM: dts: bcm5301x: Add TWD WD Support to DT
  ARM: dts: bcm5301x: Add I2C support to the DT

 arch/arm/boot/dts/bcm5301x.dtsi | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

-- 
2.7.4

[PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Jon Mason]

From: Jon Mason <jonmason@broadcom.com>

Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that.  Also, the GIC masks were added for these.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
 arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 4fbb089..3fbc450 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -70,10 +70,19 @@
 			clocks = <&periph_clk>;
 		};
 
-		local-timer@20600 {
+		timer@20600 {
 			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0x20600 0x100>;
-			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x20600 0x20>;
+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+						  IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&periph_clk>;
+		};
+
+		watchdog@20620 {
+			compatible = "arm,cortex-a9-twd-wdt";
+			reg = <0x20620 0x20>;
+			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
+						  IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&periph_clk>;
 		};
 
-- 
2.7.4

Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Rafał Miłecki]

On 28 February 2017 at 21:31, Jon Mason <jon.mason@broadcom.com> wrote:
> @@ -70,10 +70,19 @@
>                         clocks = <&periph_clk>;
>                 };
>
> -               local-timer@20600 {
> +               timer@20600 {

Is there a reason for this rename? I don't really have preference for
any name, it's just we shouldn't keep renaming this depending of
personal preferences.

It also doesn't seem like adjusting to any schema:
bcm63138.dtsi uses local-timer@1e600
bcm-nsp.dtsi uses twd-timer@20600
berlin2cd.dtsi uses local-timer@ad0600
berlin2.dtsi uses local-timer@ad0600
berlin2q.dtsi uses local-timer@ad0600


>                         compatible = "arm,cortex-a9-twd-timer";
> -                       reg = <0x20600 0x100>;
> -                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +                       reg = <0x20600 0x20>;
> +                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> +                                                 IRQ_TYPE_LEVEL_HIGH)>;
> +                       clocks = <&periph_clk>;
> +               };

The rest looks OK, thanks! :)

-- 
Rafał

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Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Jon Mason]

On Tue, Feb 28, 2017 at 3:43 PM, Rafał Miłecki <zajec5@gmail.com> wrote:
> On 28 February 2017 at 21:31, Jon Mason <jon.mason@broadcom.com> wrote:
>> @@ -70,10 +70,19 @@
>>                         clocks = <&periph_clk>;
>>                 };
>>
>> -               local-timer@20600 {
>> +               timer@20600 {
>
> Is there a reason for this rename? I don't really have preference for
> any name, it's just we shouldn't keep renaming this depending of
> personal preferences.
>
> It also doesn't seem like adjusting to any schema:
> bcm63138.dtsi uses local-timer@1e600
> bcm-nsp.dtsi uses twd-timer@20600
> berlin2cd.dtsi uses local-timer@ad0600
> berlin2.dtsi uses local-timer@ad0600
> berlin2q.dtsi uses local-timer@ad0600

This was a suggestion from Sergei Shtylyov
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/395160.html


>
>>                         compatible = "arm,cortex-a9-twd-timer";
>> -                       reg = <0x20600 0x100>;
>> -                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> +                       reg = <0x20600 0x20>;
>> +                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
>> +                                                 IRQ_TYPE_LEVEL_HIGH)>;
>> +                       clocks = <&periph_clk>;
>> +               };
>
> The rest looks OK, thanks! :)
>
> --
> Rafał

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Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Rafał Miłecki]

On 28 February 2017 at 21:46, Jon Mason <jon.mason@broadcom.com> wrote:
> On Tue, Feb 28, 2017 at 3:43 PM, Rafał Miłecki <zajec5@gmail.com> wrote:
>> On 28 February 2017 at 21:31, Jon Mason <jon.mason@broadcom.com> wrote:
>>> @@ -70,10 +70,19 @@
>>>                         clocks = <&periph_clk>;
>>>                 };
>>>
>>> -               local-timer@20600 {
>>> +               timer@20600 {
>>
>> Is there a reason for this rename? I don't really have preference for
>> any name, it's just we shouldn't keep renaming this depending of
>> personal preferences.
>>
>> It also doesn't seem like adjusting to any schema:
>> bcm63138.dtsi uses local-timer@1e600
>> bcm-nsp.dtsi uses twd-timer@20600
>> berlin2cd.dtsi uses local-timer@ad0600
>> berlin2.dtsi uses local-timer@ad0600
>> berlin2q.dtsi uses local-timer@ad0600
>
> This was a suggestion from Sergei Shtylyov
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/395160.html

Good to know, thanks!

-- 
Rafał

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Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Rafał Miłecki]

On 02/28/2017 09:31 PM, Jon Mason wrote:
> From: Jon Mason <jonmason@broadcom.com>
>
> Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
> ARM TWD timer allocated the register space for the WDT, so this patch
> necessitated shrinking that.  Also, the GIC masks were added for these.
>
> Signed-off-by: Jon Mason <jonmason@broadcom.com>
> ---
>  arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 4fbb089..3fbc450 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -70,10 +70,19 @@
>  			clocks = <&periph_clk>;
>  		};
>
> -		local-timer@20600 {
> +		timer@20600 {
>  			compatible = "arm,cortex-a9-twd-timer";
> -			reg = <0x20600 0x100>;
> -			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> +			reg = <0x20600 0x20>;
> +			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> +						  IRQ_TYPE_LEVEL_HIGH)>;
> +			clocks = <&periph_clk>;
> +		};

If you follow my recent e-mail thread:
BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13)
you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be
IRQ_TYPE_EDGE_RISING.

I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc stable
for kernels 4.8+.

The same change is needed for "arm,cortex-a9-global-timer".

Would you find time to revise this patch?

Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Jon Mason]

[-- Attachment #1: Type: text/plain, Size: 1994 bytes --]

On Thu, Mar 2, 2017 at 1:54 PM, Rafał Miłecki <zajec5@gmail.com> wrote:

> On 02/28/2017 09:31 PM, Jon Mason wrote:
>
>> From: Jon Mason <jonmason@broadcom.com>
>>
>> Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
>> ARM TWD timer allocated the register space for the WDT, so this patch
>> necessitated shrinking that.  Also, the GIC masks were added for these.
>>
>> Signed-off-by: Jon Mason <jonmason@broadcom.com>
>> ---
>>  arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
>>  1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi
>> b/arch/arm/boot/dts/bcm5301x.dtsi
>> index 4fbb089..3fbc450 100644
>> --- a/arch/arm/boot/dts/bcm5301x.dtsi
>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
>> @@ -70,10 +70,19 @@
>>                         clocks = <&periph_clk>;
>>                 };
>>
>> -               local-timer@20600 {
>> +               timer@20600 {
>>                         compatible = "arm,cortex-a9-twd-timer";
>> -                       reg = <0x20600 0x100>;
>> -                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> +                       reg = <0x20600 0x20>;
>> +                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
>> +                                                 IRQ_TYPE_LEVEL_HIGH)>;
>> +                       clocks = <&periph_clk>;
>> +               };
>>
>
> If you follow my recent e-mail thread:
> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13)
> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be
> IRQ_TYPE_EDGE_RISING.
>
> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc
> stable
> for kernels 4.8+.
>
> The same change is needed for "arm,cortex-a9-global-timer".
>
> Would you find time to revise this patch?
>

I'll do 2 patches.  One to revise this one and one to address the issue
you've discovered.  Will that be okay for you?

[-- Attachment #2: Type: text/html, Size: 2916 bytes --]

Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT

[Rafał Miłecki]

On 2 March 2017 at 20:00, Jon Mason <jon.mason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> wrote:
> On Thu, Mar 2, 2017 at 1:54 PM, Rafał Miłecki <zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>
>> On 02/28/2017 09:31 PM, Jon Mason wrote:
>>>
>>> From: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>>>
>>> Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
>>> ARM TWD timer allocated the register space for the WDT, so this patch
>>> necessitated shrinking that.  Also, the GIC masks were added for these.
>>>
>>> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
>>> ---
>>>  arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
>>>  1 file changed, 12 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi
>>> b/arch/arm/boot/dts/bcm5301x.dtsi
>>> index 4fbb089..3fbc450 100644
>>> --- a/arch/arm/boot/dts/bcm5301x.dtsi
>>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
>>> @@ -70,10 +70,19 @@
>>>                         clocks = <&periph_clk>;
>>>                 };
>>>
>>> -               local-timer@20600 {
>>> +               timer@20600 {
>>>                         compatible = "arm,cortex-a9-twd-timer";
>>> -                       reg = <0x20600 0x100>;
>>> -                       interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
>>> +                       reg = <0x20600 0x20>;
>>> +                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2)
>>> |
>>> +                                                 IRQ_TYPE_LEVEL_HIGH)>;
>>> +                       clocks = <&periph_clk>;
>>> +               };
>>
>>
>> If you follow my recent e-mail thread:
>> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13)
>> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be
>> IRQ_TYPE_EDGE_RISING.
>>
>> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc
>> stable
>> for kernels 4.8+.
>>
>> The same change is needed for "arm,cortex-a9-global-timer".
>>
>> Would you find time to revise this patch?
>
>
> I'll do 2 patches.  One to revise this one and one to address the issue
> you've discovered.  Will that be okay for you?

Sure. Please make sure you switch to IRQ_TYPE_EDGE_RISING before doing
other changes, so it can be applied cleanly to the stable kernels.

-- 
Rafał
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[PATCH 2/2] ARM: dts: bcm5301x: Add I2C support to the DT

[Jon Mason]

From: Jon Mason <jonmason@broadcom.com>

Add I2C support to the bcm5301x Device Tree.  Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
 arch/arm/boot/dts/bcm5301x.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 3fbc450..dd5c7ad 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -338,6 +338,15 @@
 		};
 	};
 
+	i2c0: i2c@18009000 {
+		compatible = "brcm,iproc-i2c";
+		reg = <0x18009000 0x50>;
+		interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-frequency = <100000>;
+	};
+
 	lcpll0: lcpll0@1800c100 {
 		#clock-cells = <1>;
 		compatible = "brcm,nsp-lcpll0";
-- 
2.7.4