From: Dilip Kota <eswara.kota@linux.intel.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Philipp Zabel <pza@pengutronix.de>
Cc: "Chuan Hua, Lei" <chuanhua.lei@linux.intel.com>,
cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, qi-ming.wu@intel.com,
robh@kernel.org, Hauke Mehrtens <hauke@hauke-m.de>
Subject: Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC
Date: Tue, 8 Oct 2019 10:47:03 +0800 [thread overview]
Message-ID: <148c53a5-e9d5-48c3-14c9-196465e9f593@linux.intel.com> (raw)
In-Reply-To: <CAFBinCAEzBk7tT5M-F3H4kLnKURRkK2oSSAmKkrjAn7_wdAROA@mail.gmail.com>
Hi Martin,Philipp,
On 10/8/2019 3:53 AM, Martin Blumenstingl wrote:
> Hi Philipp,
>
> On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel <pza@pengutronix.de> wrote:
> [...]
>>> because the register layout was greatly simplified for the newer SoCs
>>> (for which there is reset-intel) compared to the older ones
>>> (reset-lantiq).
>>> Dilip's suggestion (in my own words) is that you take his new
>>> reset-intel driver, then we will work on porting reset-lantiq over to
>>> that so in the end we can drop the reset-lantiq driver.
>> Just to be sure, you are suggesting to add support for the current
>> lantiq,reset binding to the reset-intel driver at a later point? I
>> see no reason not to do that, but I'm also not quite sure what the
>> benefit will be over just keeping reset-lantiq as is?
> according to Chuan and Dilip the current reset-lantiq implementation
> is wrong [0].
> my understanding is that the Lantiq and Intel LGM reset controllers
> are identical except:
> - the Lantiq variant uses a weird register layout (reset and status
> registers not at consecutive offsets)
> - the bits of the reset and status registers sometimes don't match on
> the Lantiq variant
> - the Intel variant has a dedicated registers area for the reset
> controller registers, while the Lantiq variant mixes them with various
> other functionality (for example: USB2 PHYs)
>
>>> This approach means more work for me (as I am probably the one who
>>> then has to do the work to port reset-lantiq over to reset-intel).
>> More work than what alternative?
> compared to "fixing" the existing reset-lantiq driver (reset callback)
> and then (instead of adding a new driver) integrating Intel LGM
> support into reset-lantiq
Integrating Intel LGM support into reset-lantiq boils down to re-writing
reset-lantiq driver as intel-reset driver and adding Lantiq variant
support. Why because reset-lantiq driver is not according to hardware
design[1].
I see the final best solution is to integrate Lantiq variant driver to
intel-reset driver.[1]
I hope you guys are ok with it. Please let me know your view.
Regards,
Dilip
[1]: https://www.spinics.net/lists/devicetree/msg308930.html
>
>>> I'm happy to do that work if you think that it's worth following this
>>> approach. So I want your opinion on this before I spend any effort on
>>> porting reset-lantiq over to reset-intel.
>> Reset drivers are typically so simple, I'm not quite sure whether it is
>> worth to integrate multiple drivers if it complicates matters too much.
>> In this case though I expect it would just be adding support for a
>> custom .of_xlate and lantiq specific register property parsing?
> yes, that's how I understand the Lantiq and Intel reset controllers:
> - reset/status/assert/deassert callbacks would be shared across all variants
> - register parsing and of_xlate are SoC specific
>
>
> Martin
>
>
> [0] https://www.spinics.net/lists/devicetree/msg305951.html
next prev parent reply other threads:[~2019-10-08 2:47 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 5:28 [PATCH v2 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller Dilip Kota
2019-08-23 5:28 ` [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC Dilip Kota
2019-08-23 8:43 ` Philipp Zabel
2019-08-23 9:47 ` Dilip Kota
2019-08-23 10:09 ` Philipp Zabel
2019-08-26 7:01 ` Dilip Kota
2019-08-24 21:11 ` Martin Blumenstingl
2019-08-26 4:01 ` Chuan Hua, Lei
2019-08-26 21:49 ` Martin Blumenstingl
2019-08-27 2:23 ` Chuan Hua, Lei
2019-08-27 21:15 ` Martin Blumenstingl
2019-08-28 1:53 ` Chuan Hua, Lei
2019-08-28 20:01 ` Martin Blumenstingl
2019-08-29 2:50 ` Chuan Hua, Lei
2019-08-29 21:40 ` Martin Blumenstingl
2019-08-30 3:01 ` Chuan Hua, Lei
2019-09-01 21:38 ` Martin Blumenstingl
2019-09-02 9:45 ` Chuan Hua, Lei
2019-09-02 22:04 ` Martin Blumenstingl
2019-09-05 2:38 ` Chuan Hua, Lei
2019-09-05 20:53 ` Martin Blumenstingl
2019-09-12 6:21 ` Dilip Kota
2019-09-12 6:25 ` Dilip Kota
2019-09-12 6:38 ` Dilip Kota
2019-09-19 8:05 ` Dilip Kota
2019-09-19 8:36 ` Langer, Thomas
2019-09-19 9:12 ` Dilip Kota
2019-09-19 19:51 ` Martin Blumenstingl
2019-09-20 2:47 ` Dilip Kota
[not found] ` <29965a80-642b-8f11-b3d4-25c09c3d96cc@linux.intel.com>
2019-10-03 6:50 ` Dilip Kota
2019-10-03 14:19 ` Philipp Zabel
2019-10-07 19:53 ` Martin Blumenstingl
2019-10-08 2:47 ` Dilip Kota [this message]
2019-10-08 15:56 ` Philipp Zabel
2019-10-14 9:41 ` Dilip Kota
2019-08-23 12:25 ` [PATCH v2 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller Rob Herring
2019-08-26 9:52 ` Dilip Kota
2019-08-26 11:23 ` Rob Herring
2019-08-27 14:04 ` Dilip Kota
2019-08-28 2:59 ` Dilip Kota
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