From: Alexey Firago <alexey_firago-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
To: mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Alexey Firago <alexey_firago-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
Subject: [PATCH v2 0/3] clk: Add support for IDT 5P49V5935
Date: Wed, 5 Apr 2017 14:46:56 +0300 [thread overview]
Message-ID: <1491392819-698-1-git-send-email-alexey_firago@mentor.com> (raw)
This series adds support for IDT VersaClock 5P49V5935 programmable clock
generator to the existing clk-versaclock5 driver.
Patches were verified on Avnet UltraZed-EG board with IO Carrier Card.
Changes in V2:
- Introduce vc5_chip_info structure describing chip features
- Set vc5_chip_info for the supported chips using clk_vc5_of_match[].data
- Add 5P49V5935 support using vc5_chip_info approach
- Fix idx comparison in vc5_of_clk_get ('>' to '>=')
Alexey Firago (3):
clk: vc5: Add structure to describe particular chip features
clk: vc5: Add bindings for IDT VersaClock 5P49V5935
clk: vc5: Add support for IDT VersaClock 5P49V5935
.../devicetree/bindings/clock/idt,versaclock5.txt | 16 ++++-
drivers/clk/clk-versaclock5.c | 80 +++++++++++++++++-----
2 files changed, 77 insertions(+), 19 deletions(-)
--
2.7.4
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next reply other threads:[~2017-04-05 11:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-05 11:46 Alexey Firago [this message]
2017-04-05 11:46 ` [PATCH v2 1/3] clk: vc5: Add structure to describe particular chip features Alexey Firago
[not found] ` <1491392819-698-2-git-send-email-alexey_firago-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-04-05 12:15 ` Geert Uytterhoeven
[not found] ` <CAMuHMdXEa=1__WMtsRphKbN6h+jVkP7szudENsM3hvGSzDfbwg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-05 12:36 ` Alexey Firago
[not found] ` <de978809-5bec-d675-1ea3-cc61804e2c61-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-04-05 14:20 ` Marek Vasut
[not found] ` <23dd9324-ee97-633d-129e-6063af757f47-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-05 15:09 ` Alexey Firago
2017-04-05 11:46 ` [PATCH v2 2/3] clk: vc5: Add bindings for IDT VersaClock 5P49V5935 Alexey Firago
[not found] ` <1491392819-698-1-git-send-email-alexey_firago-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-04-05 11:46 ` [PATCH v2 3/3] clk: vc5: Add support " Alexey Firago
2017-04-05 12:20 ` Geert Uytterhoeven
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