From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Subject: [PATCH 08/11] arm64: dts: Add GPIO DT nodes for Stingray SOC Date: Sat, 6 May 2017 17:24:43 +0530 Message-ID: <1494071686-19098-9-git-send-email-anup.patel@broadcom.com> References: <1494071686-19098-1-git-send-email-anup.patel@broadcom.com> Return-path: In-Reply-To: <1494071686-19098-1-git-send-email-anup.patel@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring , Mark Rutland , Michael Turquette Cc: Catalin Marinas , Will Deacon , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli , Oza Pawandeep , Srinath Mannam , Pramod Kumar , Sandeep Tripathy , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Pramod Kumar List-Id: devicetree@vger.kernel.org From: Pramod Kumar The GPIOs on Stingray SOC are based on iProc GPIOs hence using this we add GPIO DT nodes for Stingray SOC. Signed-off-by: Pramod Kumar Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index f9a8e8d..fb51473 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -258,6 +258,40 @@ #include "stingray-clock.dtsi" #include "stingray-pinctrl.dtsi" + gpio_crmu: gpio@66424800 { + compatible = "brcm,iproc-gpio"; + reg = <0x66424800 0x4c>; + ngpios = <6>; + #gpio-cells = <2>; + gpio-controller; + }; + + gpio_hsls: gpio@689d0000 { + compatible = "brcm,iproc-gpio"; + reg = <0x689d0000 0x864>; + ngpios = <151>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + interrupts = ; + gpio-ranges = <&pinmux 0 0 16>, + <&pinmux 16 71 2>, + <&pinmux 18 131 8>, + <&pinmux 26 83 6>, + <&pinmux 32 123 4>, + <&pinmux 36 43 24>, + <&pinmux 60 89 2>, + <&pinmux 62 73 4>, + <&pinmux 66 95 28>, + <&pinmux 94 127 4>, + <&pinmux 98 139 10>, + <&pinmux 108 16 27>, + <&pinmux 135 77 6>, + <&pinmux 141 67 4>, + <&pinmux 145 149 6>, + <&pinmux 151 91 4>; + }; + uart0: uart@68a00000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; -- 2.7.4