* [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases
@ 2017-05-16 6:28 Shawn Lin
[not found] ` <1494916134-68043-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-05-22 20:06 ` [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases Rob Herring
0 siblings, 2 replies; 7+ messages in thread
From: Shawn Lin @ 2017-05-16 6:28 UTC (permalink / raw)
To: Jaehoon Chung, Ulf Hansson
Cc: Rob Herring, linux-mmc, Doug Anderson, Ziyuan Xu, linux-rockchip,
devicetree, Shawn Lin
By default, dw_mmc-rockchip will execute tuning for each degree.
So we won't miss every point of the good sample windows. However,
probably the phases are linear inside the good sample window.
Actually we don't need to do tuning for each degree so that we could
save some time, for instance, probe the driver or resume from S3.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
Changes in v2:
- rename to rockchip,desired-num-phases
Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 520d61d..e5800f2 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -31,6 +31,10 @@ Optional Properties:
probing, low speeds or in case where all phases work at tuning time.
If not specified 0 deg will be used.
+* rockchip,desired-num-phases: The desired number of times that the host
+ execute tuning when needed. If not specified, the host will do tuning
+ for 360 times, namely tuning for each degree.
+
Example:
rkdwmmc0@12200000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread[parent not found: <1494916134-68043-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT [not found] ` <1494916134-68043-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2017-05-16 6:28 ` Shawn Lin 2017-05-18 2:20 ` Jaehoon Chung 0 siblings, 1 reply; 7+ messages in thread From: Shawn Lin @ 2017-05-16 6:28 UTC (permalink / raw) To: Jaehoon Chung, Ulf Hansson Cc: Rob Herring, linux-mmc-u79uwXL29TY76Z2rM5mHXA, Doug Anderson, Ziyuan Xu, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Lin Currently we unconditionally do tuning for each degree, which costs 900ms for each boot and resume. May someone argue that this is a question of accuracy VS time. But I would say it's a trick of how we need to do decision for our boards. If we don't care the time we spend at all, we could definitely do tuning for each degree. But when we need to improve the user experience, for instance, speed up resuming from S3, we should also have the right to do that. This patch add parsing "rockchip,desired-num-phases", for folks to specify the number of doing tuning. If not specified, 360 will be used as before. Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> --- Changes in v2: - rename property to rockchip,desired-num-phases drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- 1 file changed, 30 insertions(+), 18 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 372fb6e..a3f1c2b 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { struct clk *drv_clk; struct clk *sample_clk; int default_sample_phase; + int num_phases; }; static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) } } -#define NUM_PHASES 360 -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ + (DIV_ROUND_UP((i) * 360, num_phases)) static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) { @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) return -EIO; } - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); + ranges = kmalloc_array(priv->num_phases / 2 + 1, + sizeof(*ranges), GFP_KERNEL); if (!ranges) return -ENOMEM; /* Try each phase and extract good ranges */ - for (i = 0; i < NUM_PHASES; ) { - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); + for (i = 0; i < priv->num_phases; ) { + clk_set_phase(priv->sample_clk, + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); v = !mmc_send_tuning(mmc, opcode, NULL); @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) if (v) { ranges[range_count-1].end = i; i++; - } else if (i == NUM_PHASES - 1) { + } else if (i == priv->num_phases - 1) { /* No extra skipping rules if we're at the end */ i++; } else { @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) * one since testing bad phases is slow. Skip * 20 degrees. */ - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); + i += DIV_ROUND_UP(20 * priv->num_phases, 360); /* Always test the last one */ - if (i >= NUM_PHASES) - i = NUM_PHASES - 1; + if (i >= priv->num_phases) + i = priv->num_phases - 1; } prev_v = v; @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) range_count--; } - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { clk_set_phase(priv->sample_clk, priv->default_sample_phase); dev_info(host->dev, "All phases work, using default phase %d.", priv->default_sample_phase); @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) int len = (ranges[i].end - ranges[i].start + 1); if (len < 0) - len += NUM_PHASES; + len += priv->num_phases; if (longest_range_len < len) { longest_range_len = len; @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) } dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", - TUNING_ITERATION_TO_PHASE(ranges[i].start), - TUNING_ITERATION_TO_PHASE(ranges[i].end), + TUNING_ITERATION_TO_PHASE(ranges[i].start, + priv->num_phases), + TUNING_ITERATION_TO_PHASE(ranges[i].end, + priv->num_phases), len ); } dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, + priv->num_phases), + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, + priv->num_phases), longest_range_len ); middle_phase = ranges[longest_range].start + longest_range_len / 2; - middle_phase %= NUM_PHASES; + middle_phase %= priv->num_phases; dev_info(host->dev, "Successfully tuned phase to %d\n", - TUNING_ITERATION_TO_PHASE(middle_phase)); + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); clk_set_phase(priv->sample_clk, - TUNING_ITERATION_TO_PHASE(middle_phase)); + TUNING_ITERATION_TO_PHASE(middle_phase, + priv->num_phases)); free: kfree(ranges); @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) if (!priv) return -ENOMEM; + if (of_property_read_u32(np, "rockchip,desired-num-phases", + &priv->num_phases)) + priv->num_phases = 360; + if (of_property_read_u32(np, "rockchip,default-sample-phase", &priv->default_sample_phase)) priv->default_sample_phase = 0; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT 2017-05-16 6:28 ` [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT Shawn Lin @ 2017-05-18 2:20 ` Jaehoon Chung [not found] ` <87542133-3d88-ea4f-03b7-884274964e48-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 0 siblings, 1 reply; 7+ messages in thread From: Jaehoon Chung @ 2017-05-18 2:20 UTC (permalink / raw) To: Shawn Lin, Ulf Hansson Cc: Rob Herring, linux-mmc, Doug Anderson, Ziyuan Xu, linux-rockchip, devicetree Hi Shawn, On 05/16/2017 03:28 PM, Shawn Lin wrote: > Currently we unconditionally do tuning for each degree, which > costs 900ms for each boot and resume. > > May someone argue that this is a question of accuracy VS time. But I > would say it's a trick of how we need to do decision for our boards. > If we don't care the time we spend at all, we could definitely do tuning > for each degree. But when we need to improve the user experience, for > instance, speed up resuming from S3, we should also have the right to > do that. This patch add parsing "rockchip,desired-num-phases", for folks > to specify the number of doing tuning. If not specified, 360 will be used > as before. > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Will pick this patch with [PATCH 1/2] after getting acked tags from DT guys. Best Regards, Jaehoon Chung > > --- > > Changes in v2: > - rename property to rockchip,desired-num-phases > > drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- > 1 file changed, 30 insertions(+), 18 deletions(-) > > diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c > index 372fb6e..a3f1c2b 100644 > --- a/drivers/mmc/host/dw_mmc-rockchip.c > +++ b/drivers/mmc/host/dw_mmc-rockchip.c > @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { > struct clk *drv_clk; > struct clk *sample_clk; > int default_sample_phase; > + int num_phases; > }; > > static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) > @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) > } > } > > -#define NUM_PHASES 360 > -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) > +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ > + (DIV_ROUND_UP((i) * 360, num_phases)) > > static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > { > @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > return -EIO; > } > > - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); > + ranges = kmalloc_array(priv->num_phases / 2 + 1, > + sizeof(*ranges), GFP_KERNEL); > if (!ranges) > return -ENOMEM; > > /* Try each phase and extract good ranges */ > - for (i = 0; i < NUM_PHASES; ) { > - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); > + for (i = 0; i < priv->num_phases; ) { > + clk_set_phase(priv->sample_clk, > + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); > > v = !mmc_send_tuning(mmc, opcode, NULL); > > @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > if (v) { > ranges[range_count-1].end = i; > i++; > - } else if (i == NUM_PHASES - 1) { > + } else if (i == priv->num_phases - 1) { > /* No extra skipping rules if we're at the end */ > i++; > } else { > @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > * one since testing bad phases is slow. Skip > * 20 degrees. > */ > - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); > + i += DIV_ROUND_UP(20 * priv->num_phases, 360); > > /* Always test the last one */ > - if (i >= NUM_PHASES) > - i = NUM_PHASES - 1; > + if (i >= priv->num_phases) > + i = priv->num_phases - 1; > } > > prev_v = v; > @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > range_count--; > } > > - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { > + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { > clk_set_phase(priv->sample_clk, priv->default_sample_phase); > dev_info(host->dev, "All phases work, using default phase %d.", > priv->default_sample_phase); > @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > int len = (ranges[i].end - ranges[i].start + 1); > > if (len < 0) > - len += NUM_PHASES; > + len += priv->num_phases; > > if (longest_range_len < len) { > longest_range_len = len; > @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) > } > > dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", > - TUNING_ITERATION_TO_PHASE(ranges[i].start), > - TUNING_ITERATION_TO_PHASE(ranges[i].end), > + TUNING_ITERATION_TO_PHASE(ranges[i].start, > + priv->num_phases), > + TUNING_ITERATION_TO_PHASE(ranges[i].end, > + priv->num_phases), > len > ); > } > > dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", > - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), > - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), > + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, > + priv->num_phases), > + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, > + priv->num_phases), > longest_range_len > ); > > middle_phase = ranges[longest_range].start + longest_range_len / 2; > - middle_phase %= NUM_PHASES; > + middle_phase %= priv->num_phases; > dev_info(host->dev, "Successfully tuned phase to %d\n", > - TUNING_ITERATION_TO_PHASE(middle_phase)); > + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); > > clk_set_phase(priv->sample_clk, > - TUNING_ITERATION_TO_PHASE(middle_phase)); > + TUNING_ITERATION_TO_PHASE(middle_phase, > + priv->num_phases)); > > free: > kfree(ranges); > @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) > if (!priv) > return -ENOMEM; > > + if (of_property_read_u32(np, "rockchip,desired-num-phases", > + &priv->num_phases)) > + priv->num_phases = 360; > + > if (of_property_read_u32(np, "rockchip,default-sample-phase", > &priv->default_sample_phase)) > priv->default_sample_phase = 0; > ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <87542133-3d88-ea4f-03b7-884274964e48-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>]
* Re: [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT [not found] ` <87542133-3d88-ea4f-03b7-884274964e48-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> @ 2017-06-29 1:38 ` Shawn Lin 2017-06-29 9:47 ` Jaehoon Chung [not found] ` <35413895-08d3-c916-e5ec-d5c087260391-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 0 siblings, 2 replies; 7+ messages in thread From: Shawn Lin @ 2017-06-29 1:38 UTC (permalink / raw) To: Jaehoon Chung, Ulf Hansson Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw, devicetree-u79uwXL29TY76Z2rM5mHXA, Ziyuan Xu, linux-mmc-u79uwXL29TY76Z2rM5mHXA, Doug Anderson, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring Hi Jaehoon, On 2017/5/18 10:20, Jaehoon Chung wrote: > Hi Shawn, > > On 05/16/2017 03:28 PM, Shawn Lin wrote: >> Currently we unconditionally do tuning for each degree, which >> costs 900ms for each boot and resume. >> >> May someone argue that this is a question of accuracy VS time. But I >> would say it's a trick of how we need to do decision for our boards. >> If we don't care the time we spend at all, we could definitely do tuning >> for each degree. But when we need to improve the user experience, for >> instance, speed up resuming from S3, we should also have the right to >> do that. This patch add parsing "rockchip,desired-num-phases", for folks >> to specify the number of doing tuning. If not specified, 360 will be used >> as before. >> >> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > > Will pick this patch with [PATCH 1/2] after getting acked tags from DT guys. > patch 1 was acked by Rob, so I assume these two are material for 4.13? > Best Regards, > Jaehoon Chung > >> >> --- >> >> Changes in v2: >> - rename property to rockchip,desired-num-phases >> >> drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- >> 1 file changed, 30 insertions(+), 18 deletions(-) >> >> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c >> index 372fb6e..a3f1c2b 100644 >> --- a/drivers/mmc/host/dw_mmc-rockchip.c >> +++ b/drivers/mmc/host/dw_mmc-rockchip.c >> @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { >> struct clk *drv_clk; >> struct clk *sample_clk; >> int default_sample_phase; >> + int num_phases; >> }; >> >> static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >> @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >> } >> } >> >> -#define NUM_PHASES 360 >> -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) >> +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ >> + (DIV_ROUND_UP((i) * 360, num_phases)) >> >> static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> { >> @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> return -EIO; >> } >> >> - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); >> + ranges = kmalloc_array(priv->num_phases / 2 + 1, >> + sizeof(*ranges), GFP_KERNEL); >> if (!ranges) >> return -ENOMEM; >> >> /* Try each phase and extract good ranges */ >> - for (i = 0; i < NUM_PHASES; ) { >> - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); >> + for (i = 0; i < priv->num_phases; ) { >> + clk_set_phase(priv->sample_clk, >> + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); >> >> v = !mmc_send_tuning(mmc, opcode, NULL); >> >> @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> if (v) { >> ranges[range_count-1].end = i; >> i++; >> - } else if (i == NUM_PHASES - 1) { >> + } else if (i == priv->num_phases - 1) { >> /* No extra skipping rules if we're at the end */ >> i++; >> } else { >> @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> * one since testing bad phases is slow. Skip >> * 20 degrees. >> */ >> - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); >> + i += DIV_ROUND_UP(20 * priv->num_phases, 360); >> >> /* Always test the last one */ >> - if (i >= NUM_PHASES) >> - i = NUM_PHASES - 1; >> + if (i >= priv->num_phases) >> + i = priv->num_phases - 1; >> } >> >> prev_v = v; >> @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> range_count--; >> } >> >> - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { >> + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { >> clk_set_phase(priv->sample_clk, priv->default_sample_phase); >> dev_info(host->dev, "All phases work, using default phase %d.", >> priv->default_sample_phase); >> @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> int len = (ranges[i].end - ranges[i].start + 1); >> >> if (len < 0) >> - len += NUM_PHASES; >> + len += priv->num_phases; >> >> if (longest_range_len < len) { >> longest_range_len = len; >> @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >> } >> >> dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", >> - TUNING_ITERATION_TO_PHASE(ranges[i].start), >> - TUNING_ITERATION_TO_PHASE(ranges[i].end), >> + TUNING_ITERATION_TO_PHASE(ranges[i].start, >> + priv->num_phases), >> + TUNING_ITERATION_TO_PHASE(ranges[i].end, >> + priv->num_phases), >> len >> ); >> } >> >> dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", >> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), >> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), >> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, >> + priv->num_phases), >> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, >> + priv->num_phases), >> longest_range_len >> ); >> >> middle_phase = ranges[longest_range].start + longest_range_len / 2; >> - middle_phase %= NUM_PHASES; >> + middle_phase %= priv->num_phases; >> dev_info(host->dev, "Successfully tuned phase to %d\n", >> - TUNING_ITERATION_TO_PHASE(middle_phase)); >> + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); >> >> clk_set_phase(priv->sample_clk, >> - TUNING_ITERATION_TO_PHASE(middle_phase)); >> + TUNING_ITERATION_TO_PHASE(middle_phase, >> + priv->num_phases)); >> >> free: >> kfree(ranges); >> @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) >> if (!priv) >> return -ENOMEM; >> >> + if (of_property_read_u32(np, "rockchip,desired-num-phases", >> + &priv->num_phases)) >> + priv->num_phases = 360; >> + >> if (of_property_read_u32(np, "rockchip,default-sample-phase", >> &priv->default_sample_phase)) >> priv->default_sample_phase = 0; >> > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT 2017-06-29 1:38 ` Shawn Lin @ 2017-06-29 9:47 ` Jaehoon Chung [not found] ` <35413895-08d3-c916-e5ec-d5c087260391-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 1 sibling, 0 replies; 7+ messages in thread From: Jaehoon Chung @ 2017-06-29 9:47 UTC (permalink / raw) To: Shawn Lin, Ulf Hansson Cc: devicetree, Ziyuan Xu, linux-mmc, Doug Anderson, linux-rockchip, Rob Herring Hi Shawn, On 06/29/2017 10:38 AM, Shawn Lin wrote: > Hi Jaehoon, > > On 2017/5/18 10:20, Jaehoon Chung wrote: >> Hi Shawn, >> >> On 05/16/2017 03:28 PM, Shawn Lin wrote: >>> Currently we unconditionally do tuning for each degree, which >>> costs 900ms for each boot and resume. >>> >>> May someone argue that this is a question of accuracy VS time. But I >>> would say it's a trick of how we need to do decision for our boards. >>> If we don't care the time we spend at all, we could definitely do tuning >>> for each degree. But when we need to improve the user experience, for >>> instance, speed up resuming from S3, we should also have the right to >>> do that. This patch add parsing "rockchip,desired-num-phases", for folks >>> to specify the number of doing tuning. If not specified, 360 will be used >>> as before. >>> >>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> >> >> Will pick this patch with [PATCH 1/2] after getting acked tags from DT guys. >> > > patch 1 was acked by Rob, so I assume these two are material for 4.13? Sorry for late..Will pick and PR..Thanks! Best Regards, Jaehoon Chung > >> Best Regards, >> Jaehoon Chung >> >>> >>> --- >>> >>> Changes in v2: >>> - rename property to rockchip,desired-num-phases >>> >>> drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- >>> 1 file changed, 30 insertions(+), 18 deletions(-) >>> >>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c >>> index 372fb6e..a3f1c2b 100644 >>> --- a/drivers/mmc/host/dw_mmc-rockchip.c >>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c >>> @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { >>> struct clk *drv_clk; >>> struct clk *sample_clk; >>> int default_sample_phase; >>> + int num_phases; >>> }; >>> static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >>> @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >>> } >>> } >>> -#define NUM_PHASES 360 >>> -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) >>> +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ >>> + (DIV_ROUND_UP((i) * 360, num_phases)) >>> static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> { >>> @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> return -EIO; >>> } >>> - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); >>> + ranges = kmalloc_array(priv->num_phases / 2 + 1, >>> + sizeof(*ranges), GFP_KERNEL); >>> if (!ranges) >>> return -ENOMEM; >>> /* Try each phase and extract good ranges */ >>> - for (i = 0; i < NUM_PHASES; ) { >>> - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); >>> + for (i = 0; i < priv->num_phases; ) { >>> + clk_set_phase(priv->sample_clk, >>> + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); >>> v = !mmc_send_tuning(mmc, opcode, NULL); >>> @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> if (v) { >>> ranges[range_count-1].end = i; >>> i++; >>> - } else if (i == NUM_PHASES - 1) { >>> + } else if (i == priv->num_phases - 1) { >>> /* No extra skipping rules if we're at the end */ >>> i++; >>> } else { >>> @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> * one since testing bad phases is slow. Skip >>> * 20 degrees. >>> */ >>> - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); >>> + i += DIV_ROUND_UP(20 * priv->num_phases, 360); >>> /* Always test the last one */ >>> - if (i >= NUM_PHASES) >>> - i = NUM_PHASES - 1; >>> + if (i >= priv->num_phases) >>> + i = priv->num_phases - 1; >>> } >>> prev_v = v; >>> @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> range_count--; >>> } >>> - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { >>> + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { >>> clk_set_phase(priv->sample_clk, priv->default_sample_phase); >>> dev_info(host->dev, "All phases work, using default phase %d.", >>> priv->default_sample_phase); >>> @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> int len = (ranges[i].end - ranges[i].start + 1); >>> if (len < 0) >>> - len += NUM_PHASES; >>> + len += priv->num_phases; >>> if (longest_range_len < len) { >>> longest_range_len = len; >>> @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> } >>> dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", >>> - TUNING_ITERATION_TO_PHASE(ranges[i].start), >>> - TUNING_ITERATION_TO_PHASE(ranges[i].end), >>> + TUNING_ITERATION_TO_PHASE(ranges[i].start, >>> + priv->num_phases), >>> + TUNING_ITERATION_TO_PHASE(ranges[i].end, >>> + priv->num_phases), >>> len >>> ); >>> } >>> dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", >>> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), >>> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), >>> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, >>> + priv->num_phases), >>> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, >>> + priv->num_phases), >>> longest_range_len >>> ); >>> middle_phase = ranges[longest_range].start + longest_range_len / 2; >>> - middle_phase %= NUM_PHASES; >>> + middle_phase %= priv->num_phases; >>> dev_info(host->dev, "Successfully tuned phase to %d\n", >>> - TUNING_ITERATION_TO_PHASE(middle_phase)); >>> + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); >>> clk_set_phase(priv->sample_clk, >>> - TUNING_ITERATION_TO_PHASE(middle_phase)); >>> + TUNING_ITERATION_TO_PHASE(middle_phase, >>> + priv->num_phases)); >>> free: >>> kfree(ranges); >>> @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) >>> if (!priv) >>> return -ENOMEM; >>> + if (of_property_read_u32(np, "rockchip,desired-num-phases", >>> + &priv->num_phases)) >>> + priv->num_phases = 360; >>> + >>> if (of_property_read_u32(np, "rockchip,default-sample-phase", >>> &priv->default_sample_phase)) >>> priv->default_sample_phase = 0; >>> >> >> >> _______________________________________________ >> Linux-rockchip mailing list >> Linux-rockchip@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-rockchip >> >> >> > > -- > To unsubscribe from this list: send the line "unsubscribe linux-mmc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > > > ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <35413895-08d3-c916-e5ec-d5c087260391-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT [not found] ` <35413895-08d3-c916-e5ec-d5c087260391-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2017-06-29 10:57 ` Jaehoon Chung 0 siblings, 0 replies; 7+ messages in thread From: Jaehoon Chung @ 2017-06-29 10:57 UTC (permalink / raw) To: Shawn Lin, Ulf Hansson Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, Ziyuan Xu, linux-mmc-u79uwXL29TY76Z2rM5mHXA, Doug Anderson, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring On 06/29/2017 10:38 AM, Shawn Lin wrote: > Hi Jaehoon, Applied to my dwmmc repository. Thanks! Best Regards, Jaehoon Chung > > On 2017/5/18 10:20, Jaehoon Chung wrote: >> Hi Shawn, >> >> On 05/16/2017 03:28 PM, Shawn Lin wrote: >>> Currently we unconditionally do tuning for each degree, which >>> costs 900ms for each boot and resume. >>> >>> May someone argue that this is a question of accuracy VS time. But I >>> would say it's a trick of how we need to do decision for our boards. >>> If we don't care the time we spend at all, we could definitely do tuning >>> for each degree. But when we need to improve the user experience, for >>> instance, speed up resuming from S3, we should also have the right to >>> do that. This patch add parsing "rockchip,desired-num-phases", for folks >>> to specify the number of doing tuning. If not specified, 360 will be used >>> as before. >>> >>> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> >> >> Will pick this patch with [PATCH 1/2] after getting acked tags from DT guys. >> > > patch 1 was acked by Rob, so I assume these two are material for 4.13? > >> Best Regards, >> Jaehoon Chung >> >>> >>> --- >>> >>> Changes in v2: >>> - rename property to rockchip,desired-num-phases >>> >>> drivers/mmc/host/dw_mmc-rockchip.c | 48 ++++++++++++++++++++++++-------------- >>> 1 file changed, 30 insertions(+), 18 deletions(-) >>> >>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c >>> index 372fb6e..a3f1c2b 100644 >>> --- a/drivers/mmc/host/dw_mmc-rockchip.c >>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c >>> @@ -25,6 +25,7 @@ struct dw_mci_rockchip_priv_data { >>> struct clk *drv_clk; >>> struct clk *sample_clk; >>> int default_sample_phase; >>> + int num_phases; >>> }; >>> static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >>> @@ -133,8 +134,8 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) >>> } >>> } >>> -#define NUM_PHASES 360 >>> -#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES)) >>> +#define TUNING_ITERATION_TO_PHASE(i, num_phases) \ >>> + (DIV_ROUND_UP((i) * 360, num_phases)) >>> static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> { >>> @@ -159,13 +160,15 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> return -EIO; >>> } >>> - ranges = kmalloc_array(NUM_PHASES / 2 + 1, sizeof(*ranges), GFP_KERNEL); >>> + ranges = kmalloc_array(priv->num_phases / 2 + 1, >>> + sizeof(*ranges), GFP_KERNEL); >>> if (!ranges) >>> return -ENOMEM; >>> /* Try each phase and extract good ranges */ >>> - for (i = 0; i < NUM_PHASES; ) { >>> - clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i)); >>> + for (i = 0; i < priv->num_phases; ) { >>> + clk_set_phase(priv->sample_clk, >>> + TUNING_ITERATION_TO_PHASE(i, priv->num_phases)); >>> v = !mmc_send_tuning(mmc, opcode, NULL); >>> @@ -179,7 +182,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> if (v) { >>> ranges[range_count-1].end = i; >>> i++; >>> - } else if (i == NUM_PHASES - 1) { >>> + } else if (i == priv->num_phases - 1) { >>> /* No extra skipping rules if we're at the end */ >>> i++; >>> } else { >>> @@ -188,11 +191,11 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> * one since testing bad phases is slow. Skip >>> * 20 degrees. >>> */ >>> - i += DIV_ROUND_UP(20 * NUM_PHASES, 360); >>> + i += DIV_ROUND_UP(20 * priv->num_phases, 360); >>> /* Always test the last one */ >>> - if (i >= NUM_PHASES) >>> - i = NUM_PHASES - 1; >>> + if (i >= priv->num_phases) >>> + i = priv->num_phases - 1; >>> } >>> prev_v = v; >>> @@ -210,7 +213,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> range_count--; >>> } >>> - if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) { >>> + if (ranges[0].start == 0 && ranges[0].end == priv->num_phases - 1) { >>> clk_set_phase(priv->sample_clk, priv->default_sample_phase); >>> dev_info(host->dev, "All phases work, using default phase %d.", >>> priv->default_sample_phase); >>> @@ -222,7 +225,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> int len = (ranges[i].end - ranges[i].start + 1); >>> if (len < 0) >>> - len += NUM_PHASES; >>> + len += priv->num_phases; >>> if (longest_range_len < len) { >>> longest_range_len = len; >>> @@ -230,25 +233,30 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode) >>> } >>> dev_dbg(host->dev, "Good phase range %d-%d (%d len)\n", >>> - TUNING_ITERATION_TO_PHASE(ranges[i].start), >>> - TUNING_ITERATION_TO_PHASE(ranges[i].end), >>> + TUNING_ITERATION_TO_PHASE(ranges[i].start, >>> + priv->num_phases), >>> + TUNING_ITERATION_TO_PHASE(ranges[i].end, >>> + priv->num_phases), >>> len >>> ); >>> } >>> dev_dbg(host->dev, "Best phase range %d-%d (%d len)\n", >>> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].start), >>> - TUNING_ITERATION_TO_PHASE(ranges[longest_range].end), >>> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].start, >>> + priv->num_phases), >>> + TUNING_ITERATION_TO_PHASE(ranges[longest_range].end, >>> + priv->num_phases), >>> longest_range_len >>> ); >>> middle_phase = ranges[longest_range].start + longest_range_len / 2; >>> - middle_phase %= NUM_PHASES; >>> + middle_phase %= priv->num_phases; >>> dev_info(host->dev, "Successfully tuned phase to %d\n", >>> - TUNING_ITERATION_TO_PHASE(middle_phase)); >>> + TUNING_ITERATION_TO_PHASE(middle_phase, priv->num_phases)); >>> clk_set_phase(priv->sample_clk, >>> - TUNING_ITERATION_TO_PHASE(middle_phase)); >>> + TUNING_ITERATION_TO_PHASE(middle_phase, >>> + priv->num_phases)); >>> free: >>> kfree(ranges); >>> @@ -264,6 +272,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host) >>> if (!priv) >>> return -ENOMEM; >>> + if (of_property_read_u32(np, "rockchip,desired-num-phases", >>> + &priv->num_phases)) >>> + priv->num_phases = 360; >>> + >>> if (of_property_read_u32(np, "rockchip,default-sample-phase", >>> &priv->default_sample_phase)) >>> priv->default_sample_phase = 0; >>> >> >> >> _______________________________________________ >> Linux-rockchip mailing list >> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org >> http://lists.infradead.org/mailman/listinfo/linux-rockchip >> >> >> > > -- > To unsubscribe from this list: send the line "unsubscribe linux-mmc" in > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases 2017-05-16 6:28 [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases Shawn Lin [not found] ` <1494916134-68043-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2017-05-22 20:06 ` Rob Herring 1 sibling, 0 replies; 7+ messages in thread From: Rob Herring @ 2017-05-22 20:06 UTC (permalink / raw) To: Shawn Lin Cc: Jaehoon Chung, Ulf Hansson, linux-mmc, Doug Anderson, Ziyuan Xu, linux-rockchip, devicetree On Tue, May 16, 2017 at 02:28:53PM +0800, Shawn Lin wrote: > By default, dw_mmc-rockchip will execute tuning for each degree. > So we won't miss every point of the good sample windows. However, > probably the phases are linear inside the good sample window. > Actually we don't need to do tuning for each degree so that we could > save some time, for instance, probe the driver or resume from S3. > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > > --- > > Changes in v2: > - rename to rockchip,desired-num-phases > > Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 4 ++++ > 1 file changed, 4 insertions(+) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-06-29 10:57 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-05-16 6:28 [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases Shawn Lin
[not found] ` <1494916134-68043-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-05-16 6:28 ` [PATCH v2 2/2] mmc: dw_mmc-rockchip: parse rockchip,desired-num-phases from DT Shawn Lin
2017-05-18 2:20 ` Jaehoon Chung
[not found] ` <87542133-3d88-ea4f-03b7-884274964e48-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-06-29 1:38 ` Shawn Lin
2017-06-29 9:47 ` Jaehoon Chung
[not found] ` <35413895-08d3-c916-e5ec-d5c087260391-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-06-29 10:57 ` Jaehoon Chung
2017-05-22 20:06 ` [PATCH v2 1/2] dt-bindings: rockchip-dw-mshc: add optional rockchip,desired-num-phases Rob Herring
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).