[PATCH v1 0/2] Hi3660: enable sp804 timer

[PATCH v1 0/2] Hi3660: enable sp804 timer

[Leo Yan]

This patch set is to enable sp804 timer on Hi3660 for Hikey960 platform.

On Hi3660, the sp804 timer co-exists with CPUs' architecture timer; but
sp804 timer is located in SoC level but CPU's architecture timer is in
CPU power domain. sp804 timer is used as broadcast timer when CPU enters
idle states and the CPU (includes architecture timer) power domain is
powered off. So sp804 timer enabling is prerequisite before we enable
CPUIdle on Hi3660.

This patch set is to enable sp804 timer, the first patch is to adjust
timer regiseration so ensure clock is avaiable for timer. the second
timer is to add description for timer in dts. Have rebased this patch
set on Guodong's dts patch set [1] and verified this patch set on
Hikey960.

[1] http://archive.armlinux.org.uk/lurker/message/20170517.083733.8207a50e.en.html

Leo Yan (2):
  clk: Hi3660: change to register clock with CLK_OF_DECLARE
  arm64: dts: add sp804 timer node for Hi3660

 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++++++
 drivers/clk/hisilicon/clk-hi3660.c        | 48 ++++---------------------------
 2 files changed, 16 insertions(+), 43 deletions(-)

-- 
1.9.1

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[PATCH v1 1/2] clk: Hi3660: change to register clock with CLK_OF_DECLARE

[Leo Yan]

The timer will register into system at very early phase at kernel boot;
if timer needs to use clock, the clock should be get ready in function
of_clk_init() so later the timer driver probe can retrieve clock
successfully. This is finished in below flow on arm64:

  start_kernel()
    `-> time_init()
          `-> of_clk_init(NULL)    => register timer's clock
          `-> clocksource_probe()  => register timer

On Hi3660 the sp804 timer uses clock "osc32k", this clock is registered
as platform driver rather than CLK_OF_DECLARE method. As result, sp804
timer probe returns failure due if cannot bind clock properly. To fix
the failure, this patch is to change crgctrl clock registration from
platform driver to CLK_OF_DECLARE method so the clocks can be
registered ahead with function of_clk_init() and then timer driver can
use it.

In the clock driver clk-hi3660.c, it's pointless to mix clock
registration with platform driver mode and CLK_OF_DECLARE mode; this
patch changes all clocks registration to CLK_OF_DECLARE mode to make
code neat.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 drivers/clk/hisilicon/clk-hi3660.c | 48 ++++----------------------------------
 1 file changed, 5 insertions(+), 43 deletions(-)

diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
index fd5ce7f..fc11719 100644
--- a/drivers/clk/hisilicon/clk-hi3660.c
+++ b/drivers/clk/hisilicon/clk-hi3660.c
@@ -465,6 +465,7 @@ static void hi3660_clk_iomcu_init(struct device_node *np)
 				   ARRAY_SIZE(hi3660_iomcu_gate_sep_clks),
 				   clk_data);
 }
+CLK_OF_DECLARE(hi3660_clk_iomcu, "hisilicon,hi3660-iomcu", hi3660_clk_iomcu_init);
 
 static void hi3660_clk_pmuctrl_init(struct device_node *np)
 {
@@ -478,6 +479,7 @@ static void hi3660_clk_pmuctrl_init(struct device_node *np)
 	hisi_clk_register_gate(hi3660_pmu_gate_clks,
 			       ARRAY_SIZE(hi3660_pmu_gate_clks), clk_data);
 }
+CLK_OF_DECLARE(hi3660_clk_pmuctrl, "hisilicon,hi3660-pmuctrl", hi3660_clk_pmuctrl_init);
 
 static void hi3660_clk_pctrl_init(struct device_node *np)
 {
@@ -490,6 +492,7 @@ static void hi3660_clk_pctrl_init(struct device_node *np)
 	hisi_clk_register_gate(hi3660_pctrl_gate_clks,
 			       ARRAY_SIZE(hi3660_pctrl_gate_clks), clk_data);
 }
+CLK_OF_DECLARE(hi3660_clk_pctrl, "hisilicon,hi3660-pctrl", hi3660_clk_pctrl_init);
 
 static void hi3660_clk_sctrl_init(struct device_node *np)
 {
@@ -513,6 +516,7 @@ static void hi3660_clk_sctrl_init(struct device_node *np)
 				  ARRAY_SIZE(hi3660_sctrl_divider_clks),
 				  clk_data);
 }
+CLK_OF_DECLARE(hi3660_clk_sctrl, "hisilicon,hi3660-sctrl", hi3660_clk_sctrl_init);
 
 static void hi3660_clk_crgctrl_init(struct device_node *np)
 {
@@ -547,46 +551,4 @@ static void hi3660_clk_crgctrl_init(struct device_node *np)
 				  ARRAY_SIZE(hi3660_crgctrl_divider_clks),
 				  clk_data);
 }
-
-static const struct of_device_id hi3660_clk_match_table[] = {
-	{ .compatible = "hisilicon,hi3660-crgctrl",
-	  .data = hi3660_clk_crgctrl_init },
-	{ .compatible = "hisilicon,hi3660-pctrl",
-	  .data = hi3660_clk_pctrl_init },
-	{ .compatible = "hisilicon,hi3660-pmuctrl",
-	  .data = hi3660_clk_pmuctrl_init },
-	{ .compatible = "hisilicon,hi3660-sctrl",
-	  .data = hi3660_clk_sctrl_init },
-	{ .compatible = "hisilicon,hi3660-iomcu",
-	  .data = hi3660_clk_iomcu_init },
-	{ }
-};
-
-static int hi3660_clk_probe(struct platform_device *pdev)
-{
-	struct device *dev = &pdev->dev;
-	struct device_node *np = pdev->dev.of_node;
-	void (*init_func)(struct device_node *np);
-
-	init_func = of_device_get_match_data(dev);
-	if (!init_func)
-		return -ENODEV;
-
-	init_func(np);
-
-	return 0;
-}
-
-static struct platform_driver hi3660_clk_driver = {
-	.probe          = hi3660_clk_probe,
-	.driver         = {
-		.name   = "hi3660-clk",
-		.of_match_table = hi3660_clk_match_table,
-	},
-};
-
-static int __init hi3660_clk_init(void)
-{
-	return platform_driver_register(&hi3660_clk_driver);
-}
-core_initcall(hi3660_clk_init);
+CLK_OF_DECLARE(hi3660_clk_crgctrl, "hisilicon,hi3660-crgctrl", hi3660_clk_crgctrl_init);
-- 
1.9.1

[PATCH v1 2/2] arm64: dts: add sp804 timer node for Hi3660

[Leo Yan]

The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.

Describe it in the device tree, so it can be enabled at boot time.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 138fcba..f75c792 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -173,6 +173,17 @@
 			#clock-cells = <1>;
 		};
 
+		dual_timer0: timer@fff14000 {
+			compatible = "arm,sp804", "arm,primecell";
+			reg = <0x0 0xfff14000 0x0 0x1000>;
+			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "timer1", "timer2", "apb_pclk";
+		};
+
 		ufs: ufs@ff3b0000 {
 			compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
 			reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI standard */
-- 
1.9.1