From: Yuantian Tang <andy.tang@nxp.com>
To: shawnguo@kernel.org
Cc: tj@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
catalin.marinas@arm.com, will.deacon@arm.com,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Yuantian Tang <andy.tang@nxp.com>
Subject: [PATCH 1/2] dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list
Date: Wed, 7 Jun 2017 14:32:47 +0800 [thread overview]
Message-ID: <1496817168-26567-1-git-send-email-andy.tang@nxp.com> (raw)
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
index fc33ca0..7c3ca0e 100644
--- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
@@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
- chip could be ls1021a, ls1043a, ls1046a, ls2080a etc.
+ chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.
--
2.1.0.27.g96db324
next reply other threads:[~2017-06-07 6:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-07 6:32 Yuantian Tang [this message]
2017-06-07 6:32 ` [PATCH 2/2 v2] arm64: dts: ls1088a: update sata node Yuantian Tang
2017-06-09 13:51 ` [PATCH 1/2] dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list Rob Herring
[not found] ` <1496817168-26567-1-git-send-email-andy.tang-3arQi8VN3Tc@public.gmane.org>
2017-06-14 14:43 ` Shawn Guo
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