From: Jiancheng Xue <xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
To: sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
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xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
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Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
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yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
Jiancheng Xue
<xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Subject: [PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
Date: Wed, 21 Jun 2017 17:00:42 +0800 [thread overview]
Message-ID: <1498035645-22804-3-git-send-email-xuejiancheng@hisilicon.com> (raw)
In-Reply-To: <1498035645-22804-1-git-send-email-xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Add support for hisi-inno-usb2 phy.
Signed-off-by: Jiancheng Xue <xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
---
.../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index 0000000..21f8208
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,36 @@
+HiSilicon INNO USB2 PHY
+-----------------------
+Required properties:
+- compatible: Should be one of the following strings:
+ "hisilicon,inno-usb2-phy",
+ "hisilicon,hi3798cv200-usb2-phy",
+- #phy-cells: Must be 0
+- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.
+- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: List of phandle and reset specifier pairs for each reset signal in
+reset-names.
+- reset-names: Should be "por_rst" and "test_rst". The test_rst only
+exists in some of SOCs, so it is optional.
+
+Phy node can include up to four subnodes. Each subnode represents one port.
+The required properties of port node are as follows:
+- clocks: Phandle and clock specifier pair for utmi_clock.
+- resets: List of phandle and reset specifier pairs for port reset and utmi reset.
+- reset-names: List of reset signal names. Should be "port_rst" and "utmi_rst"
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+usb_phy: phy {
+ compatible = "hisilicon,inno_usb2_phy";
+ #phy-cells = <0>;
+ hisilicon,peripheral-syscon = <&peri_ctrl>;
+ clocks = <&crg USB2_REF_CLK>;
+ resets = <&crg 0xb4 2>;
+ reset-names = "por_rst";
+ port0 {
+ clocks = <&crg USB2_UTMI0_CLK>;
+ resets = <&crg 0xb4 5>, <&crg 0xb4 1>;
+ reset-names = "port_rst", "utmi_rst";
+ };
+ };
--
1.9.1
--
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next prev parent reply other threads:[~2017-06-21 9:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-21 9:00 [PATCH 0/5] enable usb2 function on poplar board Jiancheng Xue
2017-06-21 9:00 ` [PATCH 1/5] clk: hisilicon: add usb2 clocks for hi3798cv200 SoC Jiancheng Xue
2017-06-21 17:46 ` Stephen Boyd
[not found] ` <1498035645-22804-1-git-send-email-xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2017-06-21 9:00 ` Jiancheng Xue [this message]
2017-06-22 8:23 ` [PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy Jiancheng Xue
2017-06-26 15:56 ` Rob Herring
2017-06-21 9:00 ` [PATCH 3/5] phy: add inno-usb2-phy driver for hi3798cv200 SoC Jiancheng Xue
2017-06-21 10:52 ` [project-aspen-dev] " Daniel Thompson
2017-06-21 9:00 ` [PATCH 4/5] arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar board Jiancheng Xue
2017-06-21 9:00 ` [PATCH 5/5] arm64: defconfig: enable some drivers and configs for hi3798cv200-poplar board Jiancheng Xue
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