[PATCH 00/20] Update STM32 usart driver

[PATCH 00/20] Update STM32 usart driver

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

This patchset updates the stm32 usart driver. It mainly adds
support for fifo, dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c                   | 310 ++++++++++++++++++---
 drivers/tty/serial/stm32-usart.h                   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

-- 
1.9.1

[PATCH 02/20] dt-bindings: serial: each stm32 usart needs an alias

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Each usart controller should have an alias correctly
numbered in "aliases" node.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 85ec5f2..a229b14 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -15,14 +15,23 @@ Optional properties:
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
+Note: Each usart controller should have an alias correctly numbered
+in "aliases" node.
+
 Examples:
-usart4: serial@40004c00 {
+aliases {
+	serial0 = &usart1;
+	serial1 = &usart2;
+	serial3 = &uart4;
+};
+
+uart4: serial@40004c00 {
 	compatible = "st,stm32-uart";
 	reg = <0x40004c00 0x400>;
 	interrupts = <52>;
 	clocks = <&clk_pclk1>;
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usart4>;
+	pinctrl-0 = <&pinctrl_uart4>;
 };
 
 usart2: serial@40004400 {
-- 
1.9.1

Re: [PATCH 02/20] dt-bindings: serial: each stm32 usart needs an alias

[Rob Herring]

On Mon, Jun 26, 2017 at 12:49:09PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
> 
> Each usart controller should have an alias correctly
> numbered in "aliases" node.

This is board specific typically and doesn't need to be in the binding 
doc.

Rob
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[PATCH 01/20] serial: stm32: adding fifo support

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

This patch adds fifo mode support for rx and tx.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 3 +++
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0338562..50948f6 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,6 +453,7 @@ static int stm32_startup(struct uart_port *port)
 		return ret;
 
 	val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+	val |= USART_CR1_FIFOEN;
 	stm32_set_bits(port, ofs->cr1, val);
 
 	return 0;
@@ -467,6 +468,7 @@ static void stm32_shutdown(struct uart_port *port)
 
 	val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
 	val |= BIT(cfg->uart_enable_bit);
+	val |= USART_CR1_FIFOEN;
 	stm32_clr_bits(port, ofs->cr1, val);
 
 	free_irq(port->irq, port);
@@ -496,6 +498,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios,
 
 	cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
 	cr1 |= BIT(cfg->uart_enable_bit);
+	cr1 |= USART_CR1_FIFOEN;
 	cr2 = 0;
 	cr3 = 0;
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cd97ceb..9f0d0e8 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -134,6 +134,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_CR1_EOBIE		BIT(27)		/* F7 */
 #define USART_CR1_M1		BIT(28)		/* F7 */
 #define USART_CR1_IE_MASK	(GENMASK(8, 4) | BIT(14) | BIT(26) | BIT(27))
+#define USART_CR1_FIFOEN	BIT(29)		/* H7 */
 
 /* USART_CR2 */
 #define USART_CR2_ADD_MASK	GENMASK(3, 0)	/* F4 */
-- 
1.9.1

[PATCH 05/20] serial: stm32: add debugfs

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Adding debugfs infrastructure and one virtual
file allowing to change fifoen value.
This value change is taken into account on next
port setup or enabling.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 49 ++++++++++++++++++++++++++++++++++++++++
 drivers/tty/serial/stm32-usart.h |  3 +++
 2 files changed, 52 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 34e31d1..3ce0f7a 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -34,6 +34,51 @@
 
 #include "stm32-usart.h"
 
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/string.h>
+#include <linux/uaccess.h>
+
+static struct dentry *stm32_debugfs_root;
+static atomic_t stm32_debugfs_cnt = ATOMIC_INIT(0);
+
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+				 phys_addr_t phys_addr)
+{
+	struct device *dev = stm32port->port.dev;
+
+	if (!stm32_debugfs_root)
+		stm32_debugfs_root = debugfs_create_dir("usart-stm32", NULL);
+
+	stm32port->debugfs_dir = debugfs_create_dir(dev_name(dev),
+						    stm32_debugfs_root);
+
+	debugfs_create_bool("fifoen", 0644,
+			    stm32port->debugfs_dir, &stm32port->fifoen);
+
+	atomic_inc(&stm32_debugfs_cnt);
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+	debugfs_remove_recursive(stm32port->debugfs_dir);
+	if (atomic_dec_and_test(&stm32_debugfs_cnt)) {
+		debugfs_remove_recursive(stm32_debugfs_root);
+		stm32_debugfs_root = NULL;
+	}
+}
+#else
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+				 phys_addr_t phys_addr)
+{
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+}
+#endif
+
 static void stm32_stop_tx(struct uart_port *port);
 static void stm32_transmit_chars(struct uart_port *port);
 
@@ -672,6 +717,8 @@ static int stm32_init_port(struct stm32_port *stm32port,
 		return PTR_ERR(port->membase);
 	port->mapbase = res->start;
 
+	stm32_serial_debugfs(stm32port, res->start);
+
 	spin_lock_init(&port->lock);
 
 	stm32port->clk = devm_clk_get(&pdev->dev, NULL);
@@ -914,6 +961,8 @@ static int stm32_serial_remove(struct platform_device *pdev)
 
 	clk_disable_unprepare(stm32_port->clk);
 
+	stm32_serial_debugfs_rm(stm32_port);
+
 	return uart_remove_one_port(&stm32_usart_driver, port);
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 9429baf..a8999a1 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -216,6 +216,9 @@ struct stm32_port {
 	struct uart_port port;
 	struct clk *clk;
 	struct stm32_usart_info *info;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *debugfs_dir;
+#endif
 	struct dma_chan *rx_ch;  /* dma rx channel            */
 	dma_addr_t rx_dma_buf;   /* dma rx buffer bus address */
 	unsigned char *rx_buf;   /* dma rx buffer cpu address */
-- 
1.9.1

[PATCH 04/20] serial: stm32: make fifoen as property for each port

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 10 +++++++---
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index c6ae4fd..34e31d1 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,7 +453,8 @@ static int stm32_startup(struct uart_port *port)
 		return ret;
 
 	val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
-	val |= USART_CR1_FIFOEN;
+	if (stm32_port->fifoen)
+		val |= USART_CR1_FIFOEN;
 	stm32_set_bits(port, ofs->cr1, val);
 
 	return 0;
@@ -468,7 +469,8 @@ static void stm32_shutdown(struct uart_port *port)
 
 	val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
 	val |= BIT(cfg->uart_enable_bit);
-	val |= USART_CR1_FIFOEN;
+	if (stm32_port->fifoen)
+		val |= USART_CR1_FIFOEN;
 	stm32_clr_bits(port, ofs->cr1, val);
 
 	free_irq(port->irq, port);
@@ -498,7 +500,8 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios,
 
 	cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
 	cr1 |= BIT(cfg->uart_enable_bit);
-	cr1 |= USART_CR1_FIFOEN;
+	if (stm32_port->fifoen)
+		cr1 |= USART_CR1_FIFOEN;
 	cr2 = 0;
 	cr3 = 0;
 
@@ -707,6 +710,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 	stm32_ports[id].hw_flow_control = of_property_read_bool(np,
 							"st,hw-flow-ctrl");
 	stm32_ports[id].port.line = id;
+	stm32_ports[id].fifoen = true;
 	return &stm32_ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 33f1320..9429baf 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -224,6 +224,7 @@ struct stm32_port {
 	unsigned char *tx_buf;   /* dma tx buffer cpu address */
 	bool tx_dma_busy;	 /* dma tx busy               */
 	bool hw_flow_control;
+	bool fifoen;
 };
 
 static struct stm32_port stm32_ports[STM32_MAX_PORTS];
-- 
1.9.1

[PATCH 06/20] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 3ce0f7a..79ac167 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -247,7 +247,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
 	ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
 						isr,
 						(isr & USART_SR_TXE),
-						10, 100);
+						10, 100000);
 
 	if (ret)
 		dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1
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[PATCH 07/20] serial: stm32: less messages on dma alloc error

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Just display one info (instead of two) in the
log buffer when there is no dma.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 79ac167..dcc6d1e 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -786,10 +786,8 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port,
 
 	/* Request DMA RX channel */
 	stm32port->rx_ch = dma_request_slave_channel(dev, "rx");
-	if (!stm32port->rx_ch) {
-		dev_info(dev, "rx dma alloc failed\n");
+	if (!stm32port->rx_ch)
 		return -ENODEV;
-	}
 	stm32port->rx_buf = dma_alloc_coherent(&pdev->dev, RX_BUF_L,
 						 &stm32port->rx_dma_buf,
 						 GFP_KERNEL);
@@ -858,10 +856,8 @@ static int stm32_of_dma_tx_probe(struct stm32_port *stm32port,
 
 	/* Request DMA TX channel */
 	stm32port->tx_ch = dma_request_slave_channel(dev, "tx");
-	if (!stm32port->tx_ch) {
-		dev_info(dev, "tx dma alloc failed\n");
+	if (!stm32port->tx_ch)
 		return -ENODEV;
-	}
 	stm32port->tx_buf = dma_alloc_coherent(&pdev->dev, TX_BUF_L,
 						 &stm32port->tx_dma_buf,
 						 GFP_KERNEL);
-- 
1.9.1

[PATCH 09/20] serial: stm32: fix end of transfer

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

tx_empty: poll TC (PIO mode) or DMAT (DMA mode) bit.
flush_buffer: terminate on going DMA tx transfer.
remove: terminate DMA rx and tx transfers.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 37 ++++++++++++++++++++++++++++++++++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ed2025b..266dc4f 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -408,8 +408,14 @@ static unsigned int stm32_tx_empty(struct uart_port *port)
 {
 	struct stm32_port *stm32_port = to_stm32_port(port);
 	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+	int ret;
+
+	if (!stm32_port->tx_ch)
+		ret = readl_relaxed(port->membase + ofs->isr) & USART_SR_TC;
+	else
+		ret = readl_relaxed(port->membase + ofs->cr3) & USART_CR3_DMAT;
 
-	return readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE;
+	return ret;
 }
 
 static void stm32_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -449,6 +455,26 @@ static void stm32_start_tx(struct uart_port *port)
 	stm32_transmit_chars(port);
 }
 
+/* Flush the transmit buffer. */
+static void stm32_flush_buffer(struct uart_port *port)
+{
+	struct stm32_port *stm32_port = to_stm32_port(port);
+	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+
+	if (stm32_port->tx_ch) {
+		spin_lock(&port->lock);
+		dmaengine_terminate_all(stm32_port->tx_ch);
+		spin_unlock(&port->lock);
+		if (ofs->icr == UNDEF_REG)
+			stm32_clr_bits(port, ofs->isr, USART_SR_TC);
+		else
+			stm32_set_bits(port, ofs->icr, USART_CR_TC);
+
+		stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
+		stm32_port->tx_dma_busy = false;
+	}
+}
+
 /* Throttle the remote when input buffer is about to overflow. */
 static void stm32_throttle(struct uart_port *port)
 {
@@ -701,6 +727,7 @@ static void stm32_pm(struct uart_port *port, unsigned int state,
 	.break_ctl	= stm32_break_ctl,
 	.startup	= stm32_startup,
 	.shutdown	= stm32_shutdown,
+	.flush_buffer	= stm32_flush_buffer,
 	.set_termios	= stm32_set_termios,
 	.pm		= stm32_pm,
 	.type		= stm32_type,
@@ -950,8 +977,10 @@ static int stm32_serial_remove(struct platform_device *pdev)
 
 	stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
-	if (stm32_port->rx_ch)
+	if (stm32_port->rx_ch) {
+		dmaengine_terminate_all(stm32_port->rx_ch);
 		dma_release_channel(stm32_port->rx_ch);
+	}
 
 	if (stm32_port->rx_dma_buf)
 		dma_free_coherent(&pdev->dev,
@@ -960,8 +989,10 @@ static int stm32_serial_remove(struct platform_device *pdev)
 
 	stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
 
-	if (stm32_port->tx_ch)
+	if (stm32_port->tx_ch) {
+		dmaengine_terminate_all(stm32_port->tx_ch);
 		dma_release_channel(stm32_port->tx_ch);
+	}
 
 	if (stm32_port->tx_dma_buf)
 		dma_free_coherent(&pdev->dev,
-- 
1.9.1

[PATCH 08/20] serial: stm32: timeout interrupt using with dma

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 25 +++++++++++++++++++------
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index dcc6d1e..ed2025b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -371,6 +371,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 
 	sr = readl_relaxed(port->membase + ofs->isr);
 
+	if ((sr & USART_SR_RTOF) && (ofs->icr != UNDEF_REG))
+		writel_relaxed(USART_ICR_RTOCF,
+			       port->membase + ofs->icr);
+
 	if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
 		stm32_receive_chars(port, false);
 
@@ -453,7 +457,7 @@ static void stm32_throttle(struct uart_port *port)
 	unsigned long flags;
 
 	spin_lock_irqsave(&port->lock, flags);
-	stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+	stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
@@ -465,7 +469,7 @@ static void stm32_unthrottle(struct uart_port *port)
 	unsigned long flags;
 
 	spin_lock_irqsave(&port->lock, flags);
-	stm32_set_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+	stm32_set_bits(port, ofs->cr1, stm32_port->rx_irq);
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
@@ -475,7 +479,7 @@ static void stm32_stop_rx(struct uart_port *port)
 	struct stm32_port *stm32_port = to_stm32_port(port);
 	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
 
-	stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+	stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
 }
 
 /* Handle breaks - ignored by us */
@@ -497,7 +501,7 @@ static int stm32_startup(struct uart_port *port)
 	if (ret)
 		return ret;
 
-	val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+	val = stm32_port->rx_irq | USART_CR1_TE | USART_CR1_RE;
 	if (stm32_port->fifoen)
 		val |= USART_CR1_FIFOEN;
 	stm32_set_bits(port, ofs->cr1, val);
@@ -512,7 +516,8 @@ static void stm32_shutdown(struct uart_port *port)
 	struct stm32_usart_config *cfg = &stm32_port->info->cfg;
 	u32 val;
 
-	val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+	val = USART_CR1_TXEIE | USART_CR1_TE;
+	val |= stm32_port->rx_irq | USART_CR1_RE;
 	val |= BIT(cfg->uart_enable_bit);
 	if (stm32_port->fifoen)
 		val |= USART_CR1_FIFOEN;
@@ -543,7 +548,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios,
 	/* Stop serial port and reset value */
 	writel_relaxed(0, port->membase + ofs->cr1);
 
-	cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
+	cr1 = USART_CR1_TE | USART_CR1_RE;
 	cr1 |= BIT(cfg->uart_enable_bit);
 	if (stm32_port->fifoen)
 		cr1 |= USART_CR1_FIFOEN;
@@ -553,6 +558,13 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios,
 	if (cflag & CSTOPB)
 		cr2 |= USART_CR2_STOP_2B;
 
+	if ((ofs->rtor != UNDEF_REG) && (stm32_port->rx_ch)) {
+		stm32_port->rx_irq = USART_CR1_RTOIE;
+		writel_relaxed(baud, port->membase + ofs->rtor);
+		cr2 |= USART_CR2_RTOEN;
+	}
+	cr1 |= stm32_port->rx_irq;
+
 	if (cflag & PARENB) {
 		cr1 |= USART_CR1_PCE;
 		if ((cflag & CSIZE) == CS8) {
@@ -758,6 +770,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 							"st,hw-flow-ctrl");
 	stm32_ports[id].port.line = id;
 	stm32_ports[id].fifoen = true;
+	stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
 	return &stm32_ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index a8999a1..f9fe15b 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -225,6 +225,7 @@ struct stm32_port {
 	struct dma_chan *tx_ch;  /* dma tx channel            */
 	dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
 	unsigned char *tx_buf;   /* dma tx buffer cpu address */
+	u32 rx_irq;		 /* USART_CR1_RXNEIE or RTOIE */
 	bool tx_dma_busy;	 /* dma tx busy               */
 	bool hw_flow_control;
 	bool fifoen;
-- 
1.9.1

[PATCH 11/20] serial: stm32: add RTS support

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Signed-off-by: Bich Hemon <bich.hemon@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 13fc520..a7401b0 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -617,7 +617,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios,
 	port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
 	if (cflag & CRTSCTS) {
 		port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
-		cr3 |= USART_CR3_CTSE;
+		cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;
 	}
 
 	usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud);
-- 
1.9.1

[PATCH 12/20] serial: stm32: fix last_res value

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Set last_res value in each port

Signed-off-by: Bich Hemon <bich.hemon@st.com>
---
 drivers/tty/serial/stm32-usart.c | 6 +++---
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a7401b0..c54b89d 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -155,14 +155,13 @@ static void stm32_receive_chars(struct uart_port *port, bool threaded)
 	unsigned long c;
 	u32 sr;
 	char flag;
-	static int last_res = RX_BUF_L;
 
 	if (port->irq_wake)
 		pm_wakeup_event(tport->tty->dev, 0);
 
-	while (stm32_pending_rx(port, &sr, &last_res, threaded)) {
+	while (stm32_pending_rx(port, &sr, &stm32_port->last_res, threaded)) {
 		sr |= USART_SR_DUMMY_RX;
-		c = stm32_get_char(port, &sr, &last_res);
+		c = stm32_get_char(port, &sr, &stm32_port->last_res);
 		flag = TTY_NORMAL;
 		port->icount.rx++;
 
@@ -808,6 +807,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 	stm32_ports[id].port.line = id;
 	stm32_ports[id].fifoen = true;
 	stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
+	stm32_ports[id].last_res = RX_BUF_L;
 	return &stm32_ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index f9fe15b..056a837 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -226,6 +226,7 @@ struct stm32_port {
 	dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
 	unsigned char *tx_buf;   /* dma tx buffer cpu address */
 	u32 rx_irq;		 /* USART_CR1_RXNEIE or RTOIE */
+	int last_res;
 	bool tx_dma_busy;	 /* dma tx busy               */
 	bool hw_flow_control;
 	bool fifoen;
-- 
1.9.1

[PATCH 16/20] serial: stm32: fix fifo usage

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Fifo is available starting with stm32h7. Add has_fifo flag to use fifo
only when possible.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 drivers/tty/serial/stm32-usart.c | 9 ++++++++-
 drivers/tty/serial/stm32-usart.h | 2 ++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 05d89b0..d241056 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -49,6 +49,10 @@ static void stm32_serial_debugfs(struct stm32_port *stm32port,
 {
 	struct device *dev = stm32port->port.dev;
 
+	/* For now, debugfs is only used for fifo, then skip if unsupported */
+	if (!stm32port->info->cfg.has_fifo)
+		return;
+
 	if (!stm32_debugfs_root)
 		stm32_debugfs_root = debugfs_create_dir("usart-stm32", NULL);
 
@@ -63,6 +67,9 @@ static void stm32_serial_debugfs(struct stm32_port *stm32port,
 
 static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
 {
+	if (!stm32port->info->cfg.has_fifo)
+		return;
+
 	debugfs_remove_recursive(stm32port->debugfs_dir);
 	if (atomic_dec_and_test(&stm32_debugfs_cnt)) {
 		debugfs_remove_recursive(stm32_debugfs_root);
@@ -775,6 +782,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
 	port->dev	= &pdev->dev;
 	port->irq	= platform_get_irq(pdev, 0);
 	stm32port->wakeirq = platform_get_irq(pdev, 1);
+	stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	port->membase = devm_ioremap_resource(&pdev->dev, res);
@@ -824,7 +832,6 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 	stm32_ports[id].hw_flow_control = of_property_read_bool(np,
 							"st,hw-flow-ctrl");
 	stm32_ports[id].port.line = id;
-	stm32_ports[id].fifoen = true;
 	stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
 	stm32_ports[id].last_res = RX_BUF_L;
 	return &stm32_ports[id];
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 98dbf38..25ed28b 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -25,6 +25,7 @@ struct stm32_usart_config {
 	u8 uart_enable_bit; /* USART_CR1_UE */
 	bool has_7bits_data;
 	bool has_wakeup;
+	bool has_fifo;
 };
 
 struct stm32_usart_info {
@@ -93,6 +94,7 @@ struct stm32_usart_info stm32h7_info = {
 		.uart_enable_bit = 0,
 		.has_7bits_data = true,
 		.has_wakeup = true,
+		.has_fifo = true,
 	}
 };
 
-- 
1.9.1

[PATCH 18/20] serial: stm32: update dma buffers length

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

When stm32 dma is used alone for rx, meaning that the
third dmamux property in the device tree is 0x0, then
the received data are accumulated in dma internal fifo
until it is full before being transferred to the memory.
This dma fifo is 16 bytes wide on stm32ap1 so the dma
buffer is set to 160 bytes (= 16bytes * 10).

When stm32 dma is used combined with mdma, meaning that
the third dmamux property in the device tree is 0x1, then
the received data are accumulated per 16 bytes packets
(cf. explanation above) until the rx dma transfer period
is reached, so 160 bytes with this patch.

Due to the constraints above, the usart driver should not
be used in dma mode for rx when received data length is
unknown, as this is the case with the console.

There is no constraint for dma mode using for tx: this patch
simply align both rx and tx buffer lengths to the same value.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 25ed28b..5137e68 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -238,9 +238,9 @@ struct stm32_usart_info stm32h7_info = {
 #define STM32_SERIAL_NAME "ttyS"
 #define STM32_MAX_PORTS 8
 
-#define RX_BUF_L 200		 /* dma rx buffer length     */
+#define RX_BUF_L 160		 /* dma rx buffer length     */
 #define RX_BUF_P RX_BUF_L	 /* dma rx buffer period     */
-#define TX_BUF_L 200		 /* dma tx buffer length     */
+#define TX_BUF_L RX_BUF_L	 /* dma tx buffer length     */
 
 struct stm32_port {
 	struct uart_port port;
-- 
1.9.1

[PATCH 19/20] serial: stm32: add dma rx callback

[Bich HEMON]

From: Bich Hemon <bich.hemon@st.com>

Initial usart driver behavior consists in looking for
chars received in dma rx buffer as soon as it gets the
interrupt telling that we received some data (RXNE or
RTO).

When stm32 dma is used combined with mdma, meaning that
the third dmamux property in the device tree is 0x1,
the received data are accumulated until the rx dma
transfer period (RX_BUF_L) is reached.

In that case, the usard driver will always get a maximum
residue for the rx dma transfer and its callback will
be called after each period completion to tell that
it can get a complete buffer: this is the purpose of
this patch.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 drivers/tty/serial/stm32-usart.c | 39 +++++++++++++++++++++++++++++++++------
 drivers/tty/serial/stm32-usart.h |  7 +++++++
 2 files changed, 40 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index d241056..06a92c8 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -124,14 +124,18 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
 	*sr = readl_relaxed(port->membase + ofs->isr);
 
 	if (threaded && stm32_port->rx_ch) {
+		if (stm32_port->rx_dma_cb == CALLBACK_CALLED)
+			return 1;
 		status = dmaengine_tx_status(stm32_port->rx_ch,
 					     stm32_port->rx_ch->cookie,
 					     &state);
 		if ((status == DMA_IN_PROGRESS) &&
-		    (*last_res != state.residue))
+		    (*last_res != state.residue)) {
+			stm32_port->rx_dma_cb = CALLBACK_IGNORED;
 			return 1;
-		else
+		} else {
 			return 0;
+		}
 	} else if (*sr & USART_SR_RXNE) {
 		return 1;
 	}
@@ -147,8 +151,11 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
 
 	if (stm32_port->rx_ch) {
 		c = stm32_port->rx_buf[RX_BUF_L - (*last_res)--];
-		if ((*last_res) == 0)
+		if ((*last_res) == 0) {
 			*last_res = RX_BUF_L;
+			if (stm32_port->rx_dma_cb == CALLBACK_CALLED)
+				stm32_port->rx_dma_cb = CALLBACK_NOT_CALLED;
+		}
 		return c;
 	} else {
 		return readl_relaxed(port->membase + ofs->rdr);
@@ -238,6 +245,27 @@ static void stm32_tx_dma_complete(void *arg)
 	stm32_transmit_chars(port);
 }
 
+static void stm32_rx_dma_complete(void *arg)
+{
+	struct uart_port *port = arg;
+	struct stm32_port *stm32port = to_stm32_port(port);
+	unsigned long flags;
+
+	spin_lock_irqsave(&port->lock, flags);
+
+	/*
+	 * If the dma controller is sending the data on
+	 * the fly then we have CALLBACK_IGNORED
+	 */
+
+	if (stm32port->rx_dma_cb == CALLBACK_NOT_CALLED) {
+		stm32port->rx_dma_cb = CALLBACK_CALLED;
+		stm32_receive_chars(port, true);
+	}
+
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
 static void stm32_transmit_chars_pio(struct uart_port *port)
 {
 	struct stm32_port *stm32_port = to_stm32_port(port);
@@ -897,9 +925,8 @@ static int stm32_of_dma_rx_probe(struct stm32_port *stm32port,
 		goto config_err;
 	}
 
-	/* No callback as dma buffer is drained on usart interrupt */
-	desc->callback = NULL;
-	desc->callback_param = NULL;
+	desc->callback = stm32_rx_dma_complete;
+	desc->callback_param = port;
 
 	/* Push current DMA transaction in the pending queue */
 	cookie = dmaengine_submit(desc);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 5137e68..f8cad09 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -242,6 +242,12 @@ struct stm32_usart_info stm32h7_info = {
 #define RX_BUF_P RX_BUF_L	 /* dma rx buffer period     */
 #define TX_BUF_L RX_BUF_L	 /* dma tx buffer length     */
 
+enum dma_cb {
+	CALLBACK_NOT_CALLED,
+	CALLBACK_CALLED,
+	CALLBACK_IGNORED,
+};
+
 struct stm32_port {
 	struct uart_port port;
 	struct clk *clk;
@@ -257,6 +263,7 @@ struct stm32_port {
 	unsigned char *tx_buf;   /* dma tx buffer cpu address */
 	u32 rx_irq;		 /* USART_CR1_RXNEIE or RTOIE */
 	int last_res;
+	enum dma_cb rx_dma_cb;	 /* dma rx callback status    */
 	bool tx_dma_busy;	 /* dma tx busy               */
 	bool hw_flow_control;
 	bool fifoen;
-- 
1.9.1

[PATCH 03/20] serial: stm32: fix multi ports management

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

alias definition in the device tree is mandatory
for each port.

Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>
---
 drivers/tty/serial/stm32-usart.c | 6 ++++--
 drivers/tty/serial/stm32-usart.h | 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 50948f6..c6ae4fd 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -696,8 +696,10 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 		return NULL;
 
 	id = of_alias_get_id(np, "serial");
-	if (id < 0)
-		id = 0;
+	if (id < 0) {
+		dev_err(&pdev->dev, "failed to get alias id, errno %d\n", id);
+		return NULL;
+	}
 
 	if (WARN_ON(id >= STM32_MAX_PORTS))
 		return NULL;
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 9f0d0e8..33f1320 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -206,7 +206,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_ICR_CMCF		BIT(17)		/* F7 */
 
 #define STM32_SERIAL_NAME "ttyS"
-#define STM32_MAX_PORTS 6
+#define STM32_MAX_PORTS 8
 
 #define RX_BUF_L 200		 /* dma rx buffer length     */
 #define RX_BUF_P RX_BUF_L	 /* dma rx buffer period     */
-- 
1.9.1
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[PATCH 10/20] serial: stm32: fix dma receive

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

Two improvements for dma receive in this patch:
- usart dma receiver (DMAR) is disabled during receive
- dma receive buffer is sync-ed for cpu before reading
and given back to the dma just after

Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>
---
 drivers/tty/serial/stm32-usart.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 266dc4f..13fc520 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -393,11 +393,21 @@ static irqreturn_t stm32_threaded_interrupt(int irq, void *ptr)
 {
 	struct uart_port *port = ptr;
 	struct stm32_port *stm32_port = to_stm32_port(port);
+	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
 
 	spin_lock(&port->lock);
 
-	if (stm32_port->rx_ch)
+	if (stm32_port->rx_ch) {
+		stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
+		dma_sync_single_for_cpu(port->dev,
+					stm32_port->rx_dma_buf,
+					RX_BUF_L, DMA_FROM_DEVICE);
 		stm32_receive_chars(port, true);
+		dma_sync_single_for_device(port->dev,
+					   stm32_port->rx_dma_buf,
+					   RX_BUF_L, DMA_FROM_DEVICE);
+		stm32_set_bits(port, ofs->cr3, USART_CR3_DMAR);
+	}
 
 	spin_unlock(&port->lock);
 
-- 
1.9.1
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[PATCH 13/20] serial: stm32: fix error handling in probe

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
---
 drivers/tty/serial/stm32-usart.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index c54b89d..a62fc95 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -779,8 +779,10 @@ static int stm32_init_port(struct stm32_port *stm32port,
 		return ret;
 
 	stm32port->port.uartclk = clk_get_rate(stm32port->clk);
-	if (!stm32port->port.uartclk)
+	if (!stm32port->port.uartclk) {
+		clk_disable_unprepare(stm32port->clk);
 		ret = -EINVAL;
+	}
 
 	return ret;
 }
@@ -964,7 +966,7 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
 	ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port);
 	if (ret)
-		return ret;
+		goto err_uninit;
 
 	ret = stm32_of_dma_rx_probe(stm32port, pdev);
 	if (ret)
@@ -977,6 +979,11 @@ static int stm32_serial_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, &stm32port->port);
 
 	return 0;
+
+err_uninit:
+	clk_disable_unprepare(stm32port->clk);
+
+	return ret;
 }
 
 static int stm32_serial_remove(struct platform_device *pdev)
-- 
1.9.1
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Re: [PATCH 13/20] serial: stm32: fix error handling in probe

[Greg Kroah-Hartman]

On Mon, Jun 26, 2017 at 12:49:14PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon@st.com>
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>

Again, no changelog == no patch applied.

Please fix this, and the signed-off-by issues for all of these patches
for your next revision of this patchset.

thanks,

greg k-h

[PATCH 14/20] dt-bindings: serial: document option wake-up interrupt for STM32 USART

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

Introduce new compatibles for "st,stm32h7-usart" and "st,stm32h7-uart".
This new compatible allow to use optional wake-up interrupt.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
---
 .../devicetree/bindings/serial/st,stm32-usart.txt    | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index a229b14..3b42138 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -2,11 +2,14 @@
 
 Required properties:
 - compatible: Can be either "st,stm32-usart", "st,stm32-uart",
-"st,stm32f7-usart" or "st,stm32f7-uart" depending on whether
-the device supports synchronous mode and is compatible with
-stm32(f4) or stm32f7.
+"st,stm32f7-usart", "st,stm32f7-uart", "st,stm32h7-usart" or
+st,stm32h7-uart depending on whether the device supports synchronous
+mode and is compatible with stm32(f4), stm32f7 or stm32h7.
 - reg: The address and length of the peripheral registers space
-- interrupts: The interrupt line of the USART instance
+- interrupts or interrupts-extended: Must contain first, the interrupt
+  line specifier for the USART instance. An optional wake-up interrupt
+  specifier can be added. Then, -extended variant may be needed to specify
+  interrupts parent controllers.
 - clocks: The input clock of the USART instance
 
 Optional properties:
@@ -53,3 +56,12 @@ usart1: serial@40011000 {
 	       <&dma2 7 4 0x414 0x0>;
 	dma-names = "rx", "tx";
 };
+
+uart4: serial@40010000 {
+	compatible = "st,stm32h7-uart";
+	reg = <0x40010000 0x400>;
+	interrupts-extended = <&intc GIC_SPI 52 IRQ_TYPE_NONE>,
+			      <&aiec 30 1>;
+	clocks = <&rcc UART4_K>;
+	status = "disabled";
+};
-- 
1.9.1
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Re: [PATCH 14/20] dt-bindings: serial: document option wake-up interrupt for STM32 USART

[Rob Herring]

On Mon, Jun 26, 2017 at 12:49:15PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
> 
> Introduce new compatibles for "st,stm32h7-usart" and "st,stm32h7-uart".
> This new compatible allow to use optional wake-up interrupt.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
> ---
>  .../devicetree/bindings/serial/st,stm32-usart.txt    | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
> index a229b14..3b42138 100644
> --- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
> +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
> @@ -2,11 +2,14 @@
>  
>  Required properties:
>  - compatible: Can be either "st,stm32-usart", "st,stm32-uart",
> -"st,stm32f7-usart" or "st,stm32f7-uart" depending on whether
> -the device supports synchronous mode and is compatible with
> -stm32(f4) or stm32f7.
> +"st,stm32f7-usart", "st,stm32f7-uart", "st,stm32h7-usart" or
> +st,stm32h7-uart depending on whether the device supports synchronous
> +mode and is compatible with stm32(f4), stm32f7 or stm32h7.

Please reformat as 1 valid set of compatibles per line.

>  - reg: The address and length of the peripheral registers space
> -- interrupts: The interrupt line of the USART instance
> +- interrupts or interrupts-extended: Must contain first, the interrupt
> +  line specifier for the USART instance. An optional wake-up interrupt
> +  specifier can be added. Then, -extended variant may be needed to specify
> +  interrupts parent controllers.

Just describe the interrupts property and what the interrupts are. 
interrupts-extended is implied if it is necessary.

>  - clocks: The input clock of the USART instance
>  
>  Optional properties:
> @@ -53,3 +56,12 @@ usart1: serial@40011000 {
>  	       <&dma2 7 4 0x414 0x0>;
>  	dma-names = "rx", "tx";
>  };
> +
> +uart4: serial@40010000 {
> +	compatible = "st,stm32h7-uart";
> +	reg = <0x40010000 0x400>;
> +	interrupts-extended = <&intc GIC_SPI 52 IRQ_TYPE_NONE>,
> +			      <&aiec 30 1>;
> +	clocks = <&rcc UART4_K>;
> +	status = "disabled";
> +};
> -- 
> 1.9.1
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Re: [PATCH 14/20] dt-bindings: serial: document option wake-up interrupt for STM32 USART

[Greg Kroah-Hartman]

On Mon, Jun 26, 2017 at 12:49:15PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon@st.com>
> 
> Introduce new compatibles for "st,stm32h7-usart" and "st,stm32h7-uart".
> This new compatible allow to use optional wake-up interrupt.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>

No sign-off from you?

[PATCH 15/20] serial: stm32: Add wakeup mechanism

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

Add support for wake-up from low power modes. This extends stm32f7.
Introduce new compatible for stm32h7 to manage wake-up capability.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
---
 drivers/tty/serial/stm32-usart.c | 90 +++++++++++++++++++++++++++++++++++++++-
 drivers/tty/serial/stm32-usart.h | 29 +++++++++++++
 2 files changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a62fc95..05d89b0 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -25,6 +25,7 @@
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/pm_wakeirq.h>
 #include <linux/serial_core.h>
 #include <linux/serial.h>
 #include <linux/spinlock.h>
@@ -374,6 +375,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 		writel_relaxed(USART_ICR_RTOCF,
 			       port->membase + ofs->icr);
 
+	if ((sr & USART_SR_WUF) && (ofs->icr != UNDEF_REG))
+		writel_relaxed(USART_ICR_WUCF,
+			       port->membase + ofs->icr);
+
 	if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
 		stm32_receive_chars(port, false);
 
@@ -526,6 +531,7 @@ static int stm32_startup(struct uart_port *port)
 {
 	struct stm32_port *stm32_port = to_stm32_port(port);
 	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+	struct stm32_usart_config *cfg = &stm32_port->info->cfg;
 	const char *name = to_platform_device(port->dev)->name;
 	u32 val;
 	int ret;
@@ -536,6 +542,15 @@ static int stm32_startup(struct uart_port *port)
 	if (ret)
 		return ret;
 
+	if (cfg->has_wakeup && stm32_port->wakeirq >= 0) {
+		ret = dev_pm_set_dedicated_wake_irq(port->dev,
+						    stm32_port->wakeirq);
+		if (ret) {
+			free_irq(port->irq, port);
+			return ret;
+		}
+	}
+
 	val = stm32_port->rx_irq | USART_CR1_TE | USART_CR1_RE;
 	if (stm32_port->fifoen)
 		val |= USART_CR1_FIFOEN;
@@ -558,6 +573,7 @@ static void stm32_shutdown(struct uart_port *port)
 		val |= USART_CR1_FIFOEN;
 	stm32_clr_bits(port, ofs->cr1, val);
 
+	dev_pm_clear_wake_irq(port->dev);
 	free_irq(port->irq, port);
 }
 
@@ -758,6 +774,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
 	port->ops	= &stm32_uart_ops;
 	port->dev	= &pdev->dev;
 	port->irq	= platform_get_irq(pdev, 0);
+	stm32port->wakeirq = platform_get_irq(pdev, 1);
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	port->membase = devm_ioremap_resource(&pdev->dev, res);
@@ -819,6 +836,8 @@ static struct stm32_port *stm32_of_get_stm32_port(struct platform_device *pdev)
 	{ .compatible = "st,stm32-uart", .data = &stm32f4_info},
 	{ .compatible = "st,stm32f7-usart", .data = &stm32f7_info},
 	{ .compatible = "st,stm32f7-uart", .data = &stm32f7_info},
+	{ .compatible = "st,stm32h7-usart", .data = &stm32h7_info},
+	{ .compatible = "st,stm32h7-uart", .data = &stm32h7_info},
 	{},
 };
 
@@ -964,9 +983,15 @@ static int stm32_serial_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0) {
+		ret = device_init_wakeup(&pdev->dev, true);
+		if (ret)
+			goto err_uninit;
+	}
+
 	ret = uart_add_one_port(&stm32_usart_driver, &stm32port->port);
 	if (ret)
-		goto err_uninit;
+		goto err_nowup;
 
 	ret = stm32_of_dma_rx_probe(stm32port, pdev);
 	if (ret)
@@ -980,6 +1005,10 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
 	return 0;
 
+err_nowup:
+	if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0)
+		device_init_wakeup(&pdev->dev, false);
+
 err_uninit:
 	clk_disable_unprepare(stm32port->clk);
 
@@ -991,6 +1020,7 @@ static int stm32_serial_remove(struct platform_device *pdev)
 	struct uart_port *port = platform_get_drvdata(pdev);
 	struct stm32_port *stm32_port = to_stm32_port(port);
 	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+	struct stm32_usart_config *cfg = &stm32_port->info->cfg;
 
 	stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
@@ -1016,6 +1046,9 @@ static int stm32_serial_remove(struct platform_device *pdev)
 				  TX_BUF_L, stm32_port->tx_buf,
 				  stm32_port->tx_dma_buf);
 
+	if (cfg->has_wakeup && stm32_port->wakeirq >= 0)
+		device_init_wakeup(&pdev->dev, false);
+
 	clk_disable_unprepare(stm32_port->clk);
 
 	stm32_serial_debugfs_rm(stm32_port);
@@ -1123,11 +1156,66 @@ static int stm32_console_setup(struct console *co, char *options)
 	.cons		= STM32_SERIAL_CONSOLE,
 };
 
+#ifdef CONFIG_PM_SLEEP
+static void stm32_serial_enable_wakeup(struct uart_port *port, bool enable)
+{
+	struct stm32_port *stm32_port = to_stm32_port(port);
+	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+	struct stm32_usart_config *cfg = &stm32_port->info->cfg;
+	u32 val;
+
+	if (!cfg->has_wakeup || stm32_port->wakeirq < 0)
+		return;
+
+	if (enable) {
+		stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+		stm32_set_bits(port, ofs->cr1, USART_CR1_UESM);
+		val = readl_relaxed(port->membase + ofs->cr3);
+		val &= ~USART_CR3_WUS_MASK;
+		/* Enable Wake up interrupt from low power on start bit */
+		val |= USART_CR3_WUS_START_BIT | USART_CR3_WUFIE;
+		writel_relaxed(val, port->membase + ofs->cr3);
+		stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+	} else {
+		stm32_clr_bits(port, ofs->cr1, USART_CR1_UESM);
+	}
+}
+
+static int stm32_serial_suspend(struct device *dev)
+{
+	struct uart_port *port = dev_get_drvdata(dev);
+
+	uart_suspend_port(&stm32_usart_driver, port);
+
+	if (device_may_wakeup(dev))
+		stm32_serial_enable_wakeup(port, true);
+	else
+		stm32_serial_enable_wakeup(port, false);
+
+	return 0;
+}
+
+static int stm32_serial_resume(struct device *dev)
+{
+	struct uart_port *port = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		stm32_serial_enable_wakeup(port, false);
+
+	return uart_resume_port(&stm32_usart_driver, port);
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static const struct dev_pm_ops stm32_serial_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(stm32_serial_suspend, stm32_serial_resume)
+};
+
 static struct platform_driver stm32_serial_driver = {
 	.probe		= stm32_serial_probe,
 	.remove		= stm32_serial_remove,
 	.driver	= {
 		.name	= DRIVER_NAME,
+		.pm	= &stm32_serial_pm_ops,
 		.of_match_table = of_match_ptr(stm32_match),
 	},
 };
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 056a837..98dbf38 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -24,6 +24,7 @@ struct stm32_usart_offsets {
 struct stm32_usart_config {
 	u8 uart_enable_bit; /* USART_CR1_UE */
 	bool has_7bits_data;
+	bool has_wakeup;
 };
 
 struct stm32_usart_info {
@@ -74,6 +75,27 @@ struct stm32_usart_info stm32f7_info = {
 	}
 };
 
+struct stm32_usart_info stm32h7_info = {
+	.ofs = {
+		.cr1	= 0x00,
+		.cr2	= 0x04,
+		.cr3	= 0x08,
+		.brr	= 0x0c,
+		.gtpr	= 0x10,
+		.rtor	= 0x14,
+		.rqr	= 0x18,
+		.isr	= 0x1c,
+		.icr	= 0x20,
+		.rdr	= 0x24,
+		.tdr	= 0x28,
+	},
+	.cfg = {
+		.uart_enable_bit = 0,
+		.has_7bits_data = true,
+		.has_wakeup = true,
+	}
+};
+
 /* USART_SR (F4) / USART_ISR (F7) */
 #define USART_SR_PE		BIT(0)
 #define USART_SR_FE		BIT(1)
@@ -93,6 +115,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_SR_BUSY		BIT(16)		/* F7 */
 #define USART_SR_CMF		BIT(17)		/* F7 */
 #define USART_SR_SBKF		BIT(18)		/* F7 */
+#define USART_SR_WUF		BIT(20)		/* H7 */
 #define USART_SR_TEACK		BIT(21)		/* F7 */
 #define USART_SR_ERR_MASK	(USART_SR_LBD | USART_SR_ORE | \
 				 USART_SR_FE | USART_SR_PE)
@@ -113,6 +136,7 @@ struct stm32_usart_info stm32f7_info = {
 /* USART_CR1 */
 #define USART_CR1_SBK		BIT(0)
 #define USART_CR1_RWU		BIT(1)		/* F4 */
+#define USART_CR1_UESM		BIT(1)		/* H7 */
 #define USART_CR1_RE		BIT(2)
 #define USART_CR1_TE		BIT(3)
 #define USART_CR1_IDLEIE	BIT(4)
@@ -176,6 +200,9 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_CR3_DEM		BIT(14)		/* F7 */
 #define USART_CR3_DEP		BIT(15)		/* F7 */
 #define USART_CR3_SCARCNT_MASK	GENMASK(19, 17)	/* F7 */
+#define USART_CR3_WUS_MASK	GENMASK(21, 20)	/* H7 */
+#define USART_CR3_WUS_START_BIT	BIT(21)		/* H7 */
+#define USART_CR3_WUFIE		BIT(22)		/* H7 */
 
 /* USART_GTPR */
 #define USART_GTPR_PSC_MASK	GENMASK(7, 0)
@@ -204,6 +231,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_ICR_RTOCF		BIT(11)		/* F7 */
 #define USART_ICR_EOBCF		BIT(12)		/* F7 */
 #define USART_ICR_CMCF		BIT(17)		/* F7 */
+#define USART_ICR_WUCF		BIT(20)		/* H7 */
 
 #define STM32_SERIAL_NAME "ttyS"
 #define STM32_MAX_PORTS 8
@@ -230,6 +258,7 @@ struct stm32_port {
 	bool tx_dma_busy;	 /* dma tx busy               */
 	bool hw_flow_control;
 	bool fifoen;
+	int wakeirq;
 };
 
 static struct stm32_port stm32_ports[STM32_MAX_PORTS];
-- 
1.9.1
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[PATCH 17/20] dt-bindings: serial: stm32: add dma using note

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>
---
 .../devicetree/bindings/serial/st,stm32-usart.txt  | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 3b42138..6c1cfc8 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -18,6 +18,28 @@ Optional properties:
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
+Note for dma using:
+- "tx" dma can be used without any constraint since it uses single
+dma transfers.
+- "rx" dma using requires some attention:
+   1) if you cannot anticipate the length of your received packets
+   and if your usart device embeds an internal fifo, then DON'T use
+   dma mode.
+   2) if you enable dma mode WITHOUT mdma intermediate copy (cf.
+   stm32-dma.txt), then the availability of the received data will
+   depend on the dma driver policy and it may be delayed until dma
+   internal fifo is full. The usart driver will see this checking
+   the dma residue when rx interrupt (RXNE or RTO) occurs.
+   3) if you enable dma mode WITH mdma intermediate copy (cf.
+   stm32-dma.txt) then the usart driver will never see the dma
+   residue becoming smaller than RX_BUF_P but it will get its
+   rx dma complete callback called when the cyclic transfer period
+   (RX_BUF_P) is reached.
+The three possibilities above are ordered from the most cpu time
+consuming one to the least one. The counterpart of this optimisation
+is the reception granularity achievable by the usart driver, from
+one byte up to RX_BUF_P.
+
 Note: Each usart controller should have an alias correctly numbered
 in "aliases" node.
 
-- 
1.9.1
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Re: [PATCH 17/20] dt-bindings: serial: stm32: add dma using note

[Rob Herring]

On Mon, Jun 26, 2017 at 12:49:16PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
> 
> Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>
> ---
>  .../devicetree/bindings/serial/st,stm32-usart.txt  | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)

Sounds like broken DMA to me.

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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Re: [PATCH 17/20] dt-bindings: serial: stm32: add dma using note

[Greg Kroah-Hartman]

On Mon, Jun 26, 2017 at 12:49:16PM +0000, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
> 
> Signed-off-by: Gerald Baeza <gerald.baeza-qxv4g6HH51o@public.gmane.org>

I can't take patches without any changelog text at all, sorry.

Also, you didn't sign off on this?  Why not???
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[PATCH 20/20] serial: stm32: fix rx interrupt handling in startup

[Bich HEMON]

From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>

When stm32 dma is used, Data register has to be read in order
to clear the RXNE interrupt in case we received data before
usart probe.

Signed-off-by: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
---
 drivers/tty/serial/stm32-usart.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 06a92c8..b1f3aab 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -568,9 +568,18 @@ static int stm32_startup(struct uart_port *port)
 	struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
 	struct stm32_usart_config *cfg = &stm32_port->info->cfg;
 	const char *name = to_platform_device(port->dev)->name;
-	u32 val;
+	u32 val, sr, dr;
 	int ret;
 
+	sr = readl_relaxed(port->membase + ofs->isr);
+
+	if ((sr & USART_SR_RXNE) && (stm32_port->rx_ch))
+		ret = readl_relaxed_poll_timeout_atomic(port->membase +
+							ofs->rdr,
+							dr,
+							!(sr & USART_SR_RXNE),
+							10, 100000);
+
 	ret = request_threaded_irq(port->irq, stm32_interrupt,
 				   stm32_threaded_interrupt,
 				   IRQF_NO_SUSPEND, name, port);
-- 
1.9.1
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Re: [PATCH 00/20] Update STM32 usart driver

[Alexandre Torgue]

Greg, Rob

On 06/26/2017 02:49 PM, Bich HEMON wrote:
> From: Bich Hemon <bich.hemon-qxv4g6HH51o@public.gmane.org>
> 
> This patchset updates the stm32 usart driver. It mainly adds
> support for fifo, dma, debugfs anf fixes various bugs.
> 
> Bich Hemon (20):
>    serial: stm32: adding fifo support
>    dt-bindings: serial: each stm32 usart needs an alias
>    serial: stm32: fix multi ports management
>    serial: stm32: make fifoen as property for each port
>    serial: stm32: add debugfs
>    serial: stm32: fix pio transmit timeout
>    serial: stm32: less messages on dma alloc error
>    serial: stm32: timeout interrupt using with dma
>    serial: stm32: fix end of transfer
>    serial: stm32: fix dma receive
>    serial: stm32: add RTS support
>    serial: stm32: fix last_res value
>    serial: stm32: fix error handling in probe
>    dt-bindings: serial: document option wake-up interrupt for STM32 USART
>    serial: stm32: Add wakeup mechanism
>    serial: stm32: fix fifo usage
>    dt-bindings: serial: stm32: add dma using note
>    serial: stm32: update dma buffers length
>    serial: stm32: add dma rx callback
>    serial: stm32: fix rx interrupt handling in startup
> 
>   .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
>   drivers/tty/serial/stm32-usart.c                   | 310 ++++++++++++++++++---
>   drivers/tty/serial/stm32-usart.h                   |  51 +++-
>   3 files changed, 375 insertions(+), 41 deletions(-)
> 

This series have been abandoned (maybe not in correct way). Don't waste 
your time with that. New patches will be sent in several series and 
patches will be reworked.

Thanks
Alex


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RE: [PATCH 00/20] Update STM32 usart driver

[Bich HEMON]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 2270 bytes --]

Dear all,

Please, do not take into account this patchset. A newer version is currently being prepared with typo/format corrections and will be sent later. The previous version has to be abandoned.

Sorry for the inconvenience,

Bich HEMON



-----Original Message-----
From: Bich HEMON 
Sent: lundi 26 juin 2017 14:49
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>; Rob Herring <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>; Maxime Coquelin <mcoquelin.stm32@gmail.com>; Alexandre TORGUE <alexandre.torgue@st.com>; Jiri Slaby <jslaby@suse.com>; linux-serial@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
Cc: Bich HEMON <bich.hemon@st.com>
Subject: [PATCH 00/20] Update STM32 usart driver

From: Bich Hemon <bich.hemon@st.com>

This patchset updates the stm32 usart driver. It mainly adds support for fifo, dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c                   | 310 ++++++++++++++++++---
 drivers/tty/serial/stm32-usart.h                   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

--
1.9.1
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