From: Abhishek Sahu <absahu@codeaurora.org>
To: dwmw2@infradead.org, computersforpeace@gmail.com,
boris.brezillon@free-electrons.com, marek.vasut@gmail.com,
richard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org,
mark.rutland@arm.com
Cc: devicetree@vger.kernel.org, architt@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Abhishek Sahu <absahu@codeaurora.org>,
linux-mtd@lists.infradead.org, andy.gross@linaro.org,
sricharan@codeaurora.org
Subject: [PATCH 04/14] qcom: mtd: nand: reorganize nand devices probing
Date: Thu, 29 Jun 2017 12:45:56 +0530 [thread overview]
Message-ID: <1498720566-20782-5-git-send-email-absahu@codeaurora.org> (raw)
In-Reply-To: <1498720566-20782-1-git-send-email-absahu@codeaurora.org>
This is reorganization of exiting code and will not change any
functionality. The NAND controller supports multiple NAND device
with different page size. The subsequent patch allocate memory
which depends upon the maximum number of codewords so this patch
reorganizes the NAND device probing. First the ONFI parameter
page will be read from each connected device followed by MTD
device registration.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
drivers/mtd/nand/qcom_nandc.c | 92 ++++++++++++++++++++++++++++---------------
1 file changed, 61 insertions(+), 31 deletions(-)
diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 410ee53..eb0ec19 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -2102,14 +2102,69 @@ static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
return ret;
ret = qcom_nand_host_setup(host);
- if (ret)
- return ret;
+
+ return ret;
+}
+
+static int qcom_nand_mtd_register(struct qcom_nand_controller *nandc,
+ struct qcom_nand_host *host,
+ struct device_node *dn)
+{
+ struct nand_chip *chip = &host->chip;
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ int ret;
ret = nand_scan_tail(mtd);
if (ret)
return ret;
- return mtd_device_register(mtd, NULL, 0);
+ ret = mtd_device_register(mtd, NULL, 0);
+ if (ret)
+ nand_cleanup(mtd_to_nand(mtd));
+
+ return ret;
+}
+
+static int qcom_probe_nand_devices(struct qcom_nand_controller *nandc)
+{
+ struct device *dev = nandc->dev;
+ struct device_node *dn = dev->of_node, *child;
+ struct qcom_nand_host *host, *tmp;
+ int ret;
+
+ for_each_available_child_of_node(dn, child) {
+ if (of_device_is_compatible(child, "qcom,nandcs")) {
+ host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
+ if (!host) {
+ of_node_put(child);
+ return -ENOMEM;
+ }
+
+ ret = qcom_nand_host_init(nandc, host, child);
+ if (ret) {
+ devm_kfree(dev, host);
+ continue;
+ }
+
+ list_add_tail(&host->node, &nandc->host_list);
+ }
+ }
+
+ if (list_empty(&nandc->host_list))
+ return -ENODEV;
+
+ list_for_each_entry_safe(host, tmp, &nandc->host_list, node) {
+ ret = qcom_nand_mtd_register(nandc, host, child);
+ if (ret) {
+ list_del(&host->node);
+ devm_kfree(dev, host);
+ }
+ }
+
+ if (list_empty(&nandc->host_list))
+ return -ENODEV;
+
+ return 0;
}
/* parse custom DT properties here */
@@ -2141,10 +2196,8 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
static int qcom_nandc_probe(struct platform_device *pdev)
{
struct qcom_nand_controller *nandc;
- struct qcom_nand_host *host;
const void *dev_data;
struct device *dev = &pdev->dev;
- struct device_node *dn = dev->of_node, *child;
struct resource *res;
int ret;
const struct qcom_nand_driver_data *driver_data;
@@ -2202,35 +2255,12 @@ static int qcom_nandc_probe(struct platform_device *pdev)
if (ret)
goto err_setup;
- for_each_available_child_of_node(dn, child) {
- if (of_device_is_compatible(child, "qcom,nandcs")) {
- host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
- if (!host) {
- of_node_put(child);
- ret = -ENOMEM;
- goto err_cs_init;
- }
-
- ret = qcom_nand_host_init(nandc, host, child);
- if (ret) {
- devm_kfree(dev, host);
- continue;
- }
-
- list_add_tail(&host->node, &nandc->host_list);
- }
- }
-
- if (list_empty(&nandc->host_list)) {
- ret = -ENODEV;
- goto err_cs_init;
- }
+ ret = qcom_probe_nand_devices(nandc);
+ if (ret)
+ goto err_setup;
return 0;
-err_cs_init:
- list_for_each_entry(host, &nandc->host_list, node)
- nand_release(nand_to_mtd(&host->chip));
err_setup:
clk_disable_unprepare(nandc->aon_clk);
err_aon_clk:
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2017-06-29 7:15 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-29 7:15 [PATCH 00/14] Add QCOM QPIC NAND support Abhishek Sahu
[not found] ` <1498720566-20782-1-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-06-29 7:15 ` [PATCH 01/14] qcom: mtd: nand: Add driver data for QPIC DMA Abhishek Sahu
2017-06-29 9:46 ` Marek Vasut
2017-07-03 4:38 ` Archit Taneja
2017-07-03 19:41 ` Boris Brezillon
2017-07-17 6:11 ` Abhishek Sahu
[not found] ` <bfb3d3c466e60fa08f969ea485870ba4-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 7:22 ` Boris Brezillon
2017-07-17 8:49 ` Abhishek Sahu
2017-07-03 6:21 ` Sricharan R
2017-06-29 7:15 ` [PATCH 02/14] qcom: mtd: nand: add and initialize QPIC DMA resources Abhishek Sahu
2017-06-29 9:48 ` Marek Vasut
[not found] ` <01e12a9a-4f3b-1bde-473a-3cbe3f72ef74-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-07-17 6:36 ` Abhishek Sahu
[not found] ` <1498720566-20782-3-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-03 5:17 ` Archit Taneja
2017-07-17 6:26 ` Abhishek Sahu
2017-07-03 6:24 ` Sricharan R
2017-07-03 6:32 ` Sricharan R
2017-06-29 7:15 ` [PATCH 06/14] qcom: mtd: nand: add bam dma descriptor handling Abhishek Sahu
[not found] ` <1498720566-20782-7-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-04 6:10 ` Archit Taneja
[not found] ` <021637c8-8ce5-c54e-0254-41caa475063c-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 6:47 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 09/14] qcom: mtd: nand: BAM support for read page Abhishek Sahu
2017-07-04 9:40 ` Archit Taneja
2017-07-10 14:15 ` Sricharan R
2017-07-17 7:17 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 13/14] qcom: mtd: nand: support for QPIC version 1.5.0 Abhishek Sahu
2017-07-04 9:57 ` Archit Taneja
[not found] ` <d6566f4e-c55b-18ed-611b-35bc191b2f5f-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 7:32 ` Abhishek Sahu
2017-06-29 7:15 ` [PATCH 03/14] qcom: mtd: nand: Fixed config error for BCH Abhishek Sahu
2017-06-29 9:49 ` Marek Vasut
2017-07-03 19:47 ` Boris Brezillon
2017-07-17 6:38 ` Abhishek Sahu
[not found] ` <1498720566-20782-4-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-03 6:25 ` Sricharan R
2017-06-29 7:15 ` Abhishek Sahu [this message]
2017-06-29 7:15 ` [PATCH 05/14] qcom: mtd: nand: allocate bam transaction Abhishek Sahu
[not found] ` <1498720566-20782-6-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-06-29 9:50 ` Marek Vasut
[not found] ` <659d69fd-ae7c-b566-ccab-aca2a3efe178-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-07-17 6:42 ` Abhishek Sahu
2017-07-03 8:22 ` Sricharan R
[not found] ` <906da0d9-2ef7-583a-4008-4f444eaa340b-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 6:44 ` Abhishek Sahu
2017-06-29 7:15 ` [PATCH 07/14] qcom: mtd: nand: support for passing flags in transfer functions Abhishek Sahu
2017-06-29 9:52 ` Marek Vasut
[not found] ` <1498720566-20782-8-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-04 6:49 ` Archit Taneja
2017-07-10 14:10 ` Sricharan R
[not found] ` <70776f79-6d51-5544-8be8-38e62b7c073e-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 6:59 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 08/14] qcom: mtd: nand: Add support for additional CSRs Abhishek Sahu
2017-07-04 6:54 ` Archit Taneja
2017-07-17 7:10 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 10/14] qcom: mtd: nand: support for QPIC Page read/write Abhishek Sahu
[not found] ` <1498720566-20782-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-04 9:44 ` Archit Taneja
2017-07-17 7:25 ` Abhishek Sahu
2017-07-10 14:18 ` Sricharan R
2017-07-17 7:36 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 11/14] qcom: mtd: nand: BAM raw read and write support Abhishek Sahu
2017-06-29 7:16 ` [PATCH 12/14] qcom: mtd: nand: change register offset defines with enums Abhishek Sahu
2017-07-04 9:55 ` Archit Taneja
[not found] ` <a8961294-c72b-035c-0924-f0f901821ea4-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 7:31 ` Abhishek Sahu
2017-06-29 7:16 ` [PATCH 14/14] qcom: mtd: nand: programmed NAND_DEV_CMD_VLD register Abhishek Sahu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1498720566-20782-5-git-send-email-absahu@codeaurora.org \
--to=absahu@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=architt@codeaurora.org \
--cc=boris.brezillon@free-electrons.com \
--cc=computersforpeace@gmail.com \
--cc=cyrille.pitchen@wedev4u.fr \
--cc=devicetree@vger.kernel.org \
--cc=dwmw2@infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=marek.vasut@gmail.com \
--cc=mark.rutland@arm.com \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
--cc=sricharan@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).