From: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH] arm64: dts: fix up the gic register for the Stratix10 platform
Date: Fri, 7 Jul 2017 13:36:47 -0500 [thread overview]
Message-ID: <1499452607-30058-1-git-send-email-dinguyen@kernel.org> (raw)
The register entries for the ARM GIC-400 should have a 2nd set of address.
Signed-off-by: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 23d2ebc..1b035ed 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -75,10 +75,10 @@
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
- reg = <0x0 0xfffc1000 0x1000>,
- <0x0 0xfffc2000 0x2000>,
- <0x0 0xfffc4000 0x2000>,
- <0x0 0xfffc6000 0x2000>;
+ reg = <0x0 0xfffc1000 0x0 0x1000>,
+ <0x0 0xfffc2000 0x0 0x1000>,
+ <0x0 0xfffc4000 0x0 0x110>,
+ <0x0 0xfffc6000 0x0 0x110>;
};
soc {
--
2.7.4
--
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reply other threads:[~2017-07-07 18:36 UTC|newest]
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