* [PATCH] ARC: AXS: prepare dts files for enabling PAE40 on axs103
@ 2017-06-26 11:47 Eugeniy Paltsev
[not found] ` <20170626114725.9678-1-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Eugeniy Paltsev @ 2017-06-26 11:47 UTC (permalink / raw)
To: linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Vineet Gupta, Rob Herring,
Alexey Brodkin
Enable 64bit adressing, where it needed, to make possible
enabling PAE40 on axs103.
This patch doesn't affect on any functionality.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
---
arch/arc/boot/dts/axc001.dtsi | 20 +++++++++-----------
arch/arc/boot/dts/axc003.dtsi | 21 ++++++++++-----------
arch/arc/boot/dts/axc003_idu.dtsi | 21 ++++++++++-----------
arch/arc/boot/dts/axs10x_mb.dtsi | 2 +-
4 files changed, 30 insertions(+), 34 deletions(-)
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 53ce226..a380ffa 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -15,15 +15,15 @@
/ {
compatible = "snps,arc";
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00000000 0xf0000000 0x10000000>;
+ ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
core_clk: core_clk {
#clock-cells = <0>;
@@ -91,23 +91,21 @@
mb_intc: dw-apb-ictl@0xe0012000 {
#interrupt-cells = <1>;
compatible = "snps,dw-apb-ictl";
- reg = < 0xe0012000 0x200 >;
+ reg = < 0x0 0xe0012000 0x0 0x200 >;
interrupt-controller;
interrupt-parent = <&core_intc>;
interrupts = < 7 >;
};
memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00000000 0x80000000 0x20000000>;
device_type = "memory";
- reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */
+ /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
+ reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
};
reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
/*
* We just move frame buffer area to the very end of
@@ -118,7 +116,7 @@
*/
frame_buffer: frame_buffer@9e000000 {
compatible = "shared-dma-pool";
- reg = <0x9e000000 0x2000000>;
+ reg = <0x0 0x9e000000 0x0 0x2000000>;
no-map;
};
};
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index 14df46f..cc9239e 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -14,15 +14,15 @@
/ {
compatible = "snps,arc";
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00000000 0xf0000000 0x10000000>;
+ ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
core_clk: core_clk {
#clock-cells = <0>;
@@ -94,30 +94,29 @@
mb_intc: dw-apb-ictl@0xe0012000 {
#interrupt-cells = <1>;
compatible = "snps,dw-apb-ictl";
- reg = < 0xe0012000 0x200 >;
+ reg = < 0x0 0xe0012000 0x0 0x200 >;
interrupt-controller;
interrupt-parent = <&core_intc>;
interrupts = < 24 >;
};
memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00000000 0x80000000 0x40000000>;
device_type = "memory";
- reg = <0x80000000 0x20000000>; /* 512MiB */
+ /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
+ reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
+ 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
};
reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
/*
* Move frame buffer out of IOC aperture (0x8z-0xAz).
*/
frame_buffer: frame_buffer@be000000 {
compatible = "shared-dma-pool";
- reg = <0xbe000000 0x2000000>;
+ reg = <0x0 0xbe000000 0x0 0x2000000>;
no-map;
};
};
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 695f9fa..4ebb2170 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -14,15 +14,15 @@
/ {
compatible = "snps,arc";
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00000000 0xf0000000 0x10000000>;
+ ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
core_clk: core_clk {
#clock-cells = <0>;
@@ -100,30 +100,29 @@
mb_intc: dw-apb-ictl@0xe0012000 {
#interrupt-cells = <1>;
compatible = "snps,dw-apb-ictl";
- reg = < 0xe0012000 0x200 >;
+ reg = < 0x0 0xe0012000 0x0 0x200 >;
interrupt-controller;
interrupt-parent = <&idu_intc>;
interrupts = <0>;
};
memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00000000 0x80000000 0x40000000>;
device_type = "memory";
- reg = <0x80000000 0x20000000>; /* 512MiB */
+ /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
+ reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
+ 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
};
reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
/*
* Move frame buffer out of IOC aperture (0x8z-0xAz).
*/
frame_buffer: frame_buffer@be000000 {
compatible = "shared-dma-pool";
- reg = <0xbe000000 0x2000000>;
+ reg = <0x0 0xbe000000 0x0 0x2000000>;
no-map;
};
};
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 41cfb29..0ff7e07 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -13,7 +13,7 @@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x00000000 0xe0000000 0x10000000>;
+ ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
interrupt-parent = <&mb_intc>;
i2sclk: i2sclk@100a0 {
--
2.9.3
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^ permalink raw reply related [flat|nested] 3+ messages in thread[parent not found: <20170626114725.9678-1-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>]
* Re: [PATCH] ARC: AXS: prepare dts files for enabling PAE40 on axs103 [not found] ` <20170626114725.9678-1-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> @ 2017-07-07 19:57 ` Vineet Gupta [not found] ` <b6f3e4d2-0569-6f06-f690-eed3de402723-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> 0 siblings, 1 reply; 3+ messages in thread From: Vineet Gupta @ 2017-07-07 19:57 UTC (permalink / raw) To: Eugeniy Paltsev, linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring, Alexey Brodkin On 06/26/2017 04:47 AM, Eugeniy Paltsev wrote: > Enable 64bit adressing, where it needed, to make possible > enabling PAE40 on axs103. > > This patch doesn't affect on any functionality. > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> > --- > arch/arc/boot/dts/axc001.dtsi | 20 +++++++++----------- > arch/arc/boot/dts/axc003.dtsi | 21 ++++++++++----------- > arch/arc/boot/dts/axc003_idu.dtsi | 21 ++++++++++----------- > arch/arc/boot/dts/axs10x_mb.dtsi | 2 +- > 4 files changed, 30 insertions(+), 34 deletions(-) > > diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi > index 53ce226..a380ffa 100644 > --- a/arch/arc/boot/dts/axc001.dtsi > +++ b/arch/arc/boot/dts/axc001.dtsi > @@ -15,15 +15,15 @@ > > / { > compatible = "snps,arc"; > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > > cpu_card { > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > > - ranges = <0x00000000 0xf0000000 0x10000000>; > + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; AXS101 can't support PAE etc - but I guess you still need to make the change here because the DT bits for MB are shared ? > > core_clk: core_clk { > #clock-cells = <0>; > @@ -91,23 +91,21 @@ > mb_intc: dw-apb-ictl@0xe0012000 { > #interrupt-cells = <1>; > compatible = "snps,dw-apb-ictl"; > - reg = < 0xe0012000 0x200 >; > + reg = < 0x0 0xe0012000 0x0 0x200 >; > interrupt-controller; > interrupt-parent = <&core_intc>; > interrupts = < 7 >; > }; > > memory { > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x00000000 0x80000000 0x20000000>; > device_type = "memory"; > - reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ > + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ > + reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */ > }; > > reserved-memory { > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > ranges; > /* > * We just move frame buffer area to the very end of > @@ -118,7 +116,7 @@ > */ > frame_buffer: frame_buffer@9e000000 { > compatible = "shared-dma-pool"; > - reg = <0x9e000000 0x2000000>; > + reg = <0x0 0x9e000000 0x0 0x2000000>; > no-map; > }; > }; > diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi > index 14df46f..cc9239e 100644 > --- a/arch/arc/boot/dts/axc003.dtsi > +++ b/arch/arc/boot/dts/axc003.dtsi > @@ -14,15 +14,15 @@ > > / { > compatible = "snps,arc"; > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > > cpu_card { > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > > - ranges = <0x00000000 0xf0000000 0x10000000>; > + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; > > core_clk: core_clk { > #clock-cells = <0>; > @@ -94,30 +94,29 @@ > mb_intc: dw-apb-ictl@0xe0012000 { > #interrupt-cells = <1>; > compatible = "snps,dw-apb-ictl"; > - reg = < 0xe0012000 0x200 >; > + reg = < 0x0 0xe0012000 0x0 0x200 >; > interrupt-controller; > interrupt-parent = <&core_intc>; > interrupts = < 24 >; > }; > > memory { > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x00000000 0x80000000 0x40000000>; > device_type = "memory"; > - reg = <0x80000000 0x20000000>; /* 512MiB */ > + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ > + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */ > + 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */ > }; > > reserved-memory { > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > ranges; > /* > * Move frame buffer out of IOC aperture (0x8z-0xAz). > */ > frame_buffer: frame_buffer@be000000 { > compatible = "shared-dma-pool"; > - reg = <0xbe000000 0x2000000>; > + reg = <0x0 0xbe000000 0x0 0x2000000>; > no-map; > }; > }; > diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi > index 695f9fa..4ebb2170 100644 > --- a/arch/arc/boot/dts/axc003_idu.dtsi > +++ b/arch/arc/boot/dts/axc003_idu.dtsi > @@ -14,15 +14,15 @@ > > / { > compatible = "snps,arc"; > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > > cpu_card { > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > > - ranges = <0x00000000 0xf0000000 0x10000000>; > + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; > > core_clk: core_clk { > #clock-cells = <0>; > @@ -100,30 +100,29 @@ > mb_intc: dw-apb-ictl@0xe0012000 { > #interrupt-cells = <1>; > compatible = "snps,dw-apb-ictl"; > - reg = < 0xe0012000 0x200 >; > + reg = < 0x0 0xe0012000 0x0 0x200 >; > interrupt-controller; > interrupt-parent = <&idu_intc>; > interrupts = <0>; > }; > > memory { > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0x00000000 0x80000000 0x40000000>; > device_type = "memory"; > - reg = <0x80000000 0x20000000>; /* 512MiB */ > + /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ > + reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */ > + 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */ > }; > > reserved-memory { > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <2>; > ranges; > /* > * Move frame buffer out of IOC aperture (0x8z-0xAz). > */ > frame_buffer: frame_buffer@be000000 { > compatible = "shared-dma-pool"; > - reg = <0xbe000000 0x2000000>; > + reg = <0x0 0xbe000000 0x0 0x2000000>; > no-map; > }; > }; > diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi > index 41cfb29..0ff7e07 100644 > --- a/arch/arc/boot/dts/axs10x_mb.dtsi > +++ b/arch/arc/boot/dts/axs10x_mb.dtsi > @@ -13,7 +13,7 @@ > compatible = "simple-bus"; > #address-cells = <1>; > #size-cells = <1>; > - ranges = <0x00000000 0xe0000000 0x10000000>; > + ranges = <0x00000000 0x0 0xe0000000 0x10000000>; > interrupt-parent = <&mb_intc>; > > i2sclk: i2sclk@100a0 { -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 3+ messages in thread
[parent not found: <b6f3e4d2-0569-6f06-f690-eed3de402723-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>]
* Re: [PATCH] ARC: AXS: prepare dts files for enabling PAE40 on axs103 [not found] ` <b6f3e4d2-0569-6f06-f690-eed3de402723-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> @ 2017-07-07 22:28 ` Alexey Brodkin 0 siblings, 0 replies; 3+ messages in thread From: Alexey Brodkin @ 2017-07-07 22:28 UTC (permalink / raw) To: Vineet Gupta Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Hi Vineet, On Fri, 2017-07-07 at 12:57 -0700, Vineet Gupta wrote: > On 06/26/2017 04:47 AM, Eugeniy Paltsev wrote: > > > > Enable 64bit adressing, where it needed, to make possible > > enabling PAE40 on axs103. > > > > This patch doesn't affect on any functionality. > > > > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> > > --- > > arch/arc/boot/dts/axc001.dtsi | 20 +++++++++----------- > > arch/arc/boot/dts/axc003.dtsi | 21 ++++++++++----------- > > arch/arc/boot/dts/axc003_idu.dtsi | 21 ++++++++++----------- > > arch/arc/boot/dts/axs10x_mb.dtsi | 2 +- > > 4 files changed, 30 insertions(+), 34 deletions(-) > > > > diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi > > index 53ce226..a380ffa 100644 > > --- a/arch/arc/boot/dts/axc001.dtsi > > +++ b/arch/arc/boot/dts/axc001.dtsi > > @@ -15,15 +15,15 @@ > > > > / { > > compatible = "snps,arc"; > > - #address-cells = <1>; > > - #size-cells = <1>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > > > cpu_card { > > compatible = "simple-bus"; > > #address-cells = <1>; > > #size-cells = <1>; > > > > - ranges = <0x00000000 0xf0000000 0x10000000>; > > + ranges = <0x00000000 0x0 0xf0000000 0x10000000>; > > AXS101 can't support PAE etc - but I guess you still need to make the change here > because the DT bits for MB are shared ? Correct that's the case. So it looks misleading but as long as we want to share MB's .dtsi for both axs101 and axs103 we need to keep that change. -Alexey ^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-06-26 11:47 [PATCH] ARC: AXS: prepare dts files for enabling PAE40 on axs103 Eugeniy Paltsev
[not found] ` <20170626114725.9678-1-Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-07-07 19:57 ` Vineet Gupta
[not found] ` <b6f3e4d2-0569-6f06-f690-eed3de402723-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
2017-07-07 22:28 ` Alexey Brodkin
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