From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E35EC2BB41 for ; Tue, 16 Aug 2022 09:26:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232505AbiHPJ0Q (ORCPT ); Tue, 16 Aug 2022 05:26:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232512AbiHPJZq (ORCPT ); Tue, 16 Aug 2022 05:25:46 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 899834A833 for ; Tue, 16 Aug 2022 00:41:48 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id u1so13703066lfq.4 for ; Tue, 16 Aug 2022 00:41:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc; bh=Z4YfB/AJeb982Xz2QYWpjFSws7upX3bELQnOSH90aGQ=; b=XNiAZ2MhGZde1OxcLeMx6rt6sGhm0MIYRYttklKEzARCVhtOjGTS0I5VuPCcpOoZq4 AazIXWhkMfjWgm8AzXKS5TOFgz5lSEPLZzZ/BEUT+8Lm5H80GyoGLmJs0BSb4GWCZgoS JCqkF8hGO/4+8FfYNJ9xcdWEeGg7O7tBBr24kUBYSb/BPEDblFxPKfK5Gw96lxzkFEzt ER3UACt0W0pzppQyL+RJMr5S6YAkykB6raCdrkeY6SWQR/Sers/mv4s67CwuCykj4Tzi Mvx2YvrL1HS2p5yB8blMpvmxW38bgtOdagu886tBN0axwkfs/RY5+yT77lu2oY8h6x/u AWDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc; bh=Z4YfB/AJeb982Xz2QYWpjFSws7upX3bELQnOSH90aGQ=; b=bykezABXxQWwDNTZwdnMzTJxcAf8JpnaYpPGEA9n/pij2cD9mCuncv5dMkff56Ag2m 2lMmxDUs1CmVB2aRy4+KDQFkZBd+4wAREO4SjXjQWY44M0GPaSEcby7V0JczYINwJpZt RN9CO34iKOO4l1HVHXjeufZRpgJ7RgtlZFBPnqLdnThW+GVxk4nv9ZqXigV3950ze7MI ekvBxii7ix9iAkXX6BK3eFg+aNqSnEwEDOJESbq+LjgPtIAtV39zyzqe7qUTaxcJFlEq u5Er35bSDcQbyncHKDiQIEVcBDpOfKTGgLQa0bTK4YdX+jBUh0IcvAOLaw6A/6Ie2Ht8 5SrQ== X-Gm-Message-State: ACgBeo0FA6gIKo8zn0AikSn7kWMcseZUY+6/uUphsgfRw4a8DBkcj2bS SFbS92VZzSiCVUjY/PzI4mgf2w== X-Google-Smtp-Source: AA6agR7yvXIG3FQUMlg6GW8tRa6cjzG0FZZbYwcSTqvWyjhEU2eExfEr5GNYE/fJJDjnTXq1o1QwNw== X-Received: by 2002:a05:6512:6d3:b0:48a:e68c:15c9 with SMTP id u19-20020a05651206d300b0048ae68c15c9mr7099789lff.488.1660635706920; Tue, 16 Aug 2022 00:41:46 -0700 (PDT) Received: from ?IPV6:2001:14bb:ae:539c:1782:dd68:b0c1:c1a4? (d15l54g8c71znbtrbzt-4.rev.dnainternet.fi. [2001:14bb:ae:539c:1782:dd68:b0c1:c1a4]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb94f000000b0025d53cbba2bsm1704014ljs.45.2022.08.16.00.41.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Aug 2022 00:41:46 -0700 (PDT) Message-ID: <149eee7b-a9e9-94ad-1ab2-13812b541a8c@linaro.org> Date: Tue, 16 Aug 2022 10:41:45 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base devicetree Content-Language: en-US To: Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , linux-sunxi@lists.linux.dev, Palmer Dabbelt , Paul Walmsley , Albert Ou , linux-riscv@lists.infradead.org Cc: Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski References: <20220815050815.22340-1-samuel@sholland.org> <20220815050815.22340-7-samuel@sholland.org> From: Krzysztof Kozlowski In-Reply-To: <20220815050815.22340-7-samuel@sholland.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15/08/2022 08:08, Samuel Holland wrote: > + > + de: display-engine { > + compatible = "allwinner,sun20i-d1-display-engine"; > + allwinner,pipelines = <&mixer0>, <&mixer1>; > + status = "disabled"; > + }; > + > + osc24M: osc24M-clk { lowercase > + compatible = "fixed-clock"; > + clock-frequency = <24000000>; This is a property of the board, not SoC. > + clock-output-names = "osc24M"; > + #clock-cells = <0>; > + }; > + Best regards, Krzysztof