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[188.155.201.27]) by smtp.gmail.com with ESMTPSA id p125-20020a1c2983000000b0038e5ca446bcsm8269468wmp.5.2022.04.04.06.52.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Apr 2022 06:52:20 -0700 (PDT) Message-ID: <14c921b5-4240-a026-252a-d5fb60836b34@linaro.org> Date: Mon, 4 Apr 2022 15:52:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v3 4/5] dt-bindings: spi: add binding doc for spi-mtk-snfi Content-Language: en-US To: Chuanhong Guo , linux-spi@vger.kernel.org Cc: Mark Brown , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Roger Quadros , Thomas Bogendoerfer , Cai Huoqing , Florian Fainelli , Colin Ian King , Wolfram Sang , Paul Cercueil , Pratyush Yadav , Yu Kuai , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" , open list , "open list:NAND FLASH SUBSYSTEM" References: <20220404131818.1817794-1-gch981213@gmail.com> <20220404131818.1817794-5-gch981213@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20220404131818.1817794-5-gch981213@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 04/04/2022 15:18, Chuanhong Guo wrote: > Add device-tree binding documentation for Mediatek SPI-NAND Flash > Interface. > > Signed-off-by: Chuanhong Guo > --- > Changes since v1: > 1. add a blank line between properties in dt binding doc > 2. rename ecc-engine to nand-ecc-engine for the generic properties > > Change since v2: none > > .../bindings/spi/mediatek,spi-mtk-snfi.yaml | 88 +++++++++++++++++++ > 1 file changed, 88 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml > new file mode 100644 > index 000000000000..7d57570ad617 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml > @@ -0,0 +1,88 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SPI-NAND flash controller for MediaTek ARM SoCs > + > +maintainers: > + - Chuanhong Guo > + > +description: | > + The Mediatek SPI-NAND flash controller is an extended version of > + the Mediatek NAND flash controller. It can perform standard SPI > + instructions with one continuous write and one read for up-to 0xa0 > + bytes. It also supports typical SPI-NAND page cache operations > + in single, dual or quad IO mode with piplined ECC encoding/decoding > + using the accompanying ECC engine. There should be only one spi > + slave device following generic spi bindings. > + > +allOf: > + - $ref: /schemas/spi/spi-controller.yaml# > + > +properties: > + compatible: > + enum: > + - mediatek,mt7622-snand > + - mediatek,mt7629-snand > + > + reg: > + items: > + - description: core registers > + > + interrupts: > + items: > + - description: NFI interrupt > + > + clocks: > + items: > + - description: clock used for the controller > + - description: clock used for the SPI bus > + > + clock-names: > + items: > + - const: nfi_clk > + - const: pad_clk > + > + nand-ecc-engine: > + description: device-tree node of the accompanying ECC engine. > + $ref: /schemas/types.yaml#/definitions/phandle > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - ecc-engine Slightly slow down resends (max 1 per day). You sent v3 without giving a chance to review this. Wrong name here. Best regards, Krzysztof