From: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Cc: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Brian Norris
<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Jeffy Chen <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: [PATCH 1/7] PCI: rockchip: split out rockchip_pcie_get_phys
Date: Mon, 17 Jul 2017 15:36:16 +0800 [thread overview]
Message-ID: <1500276982-208439-2-git-send-email-shawn.lin@rock-chips.com> (raw)
In-Reply-To: <1500276982-208439-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
We plan to introduce per-lanes PHY, so split out new
function to make it easy in the future. No functional
change intended.
Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
drivers/pci/host/pcie-rockchip.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 5acf869..6632a51 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -853,6 +853,19 @@ static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
+static int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip)
+{
+ struct device *dev = rockchip->dev;
+
+ rockchip->phy = devm_phy_get(dev, "pcie-phy");
+ if (IS_ERR(rockchip->phy)) {
+ if (PTR_ERR(rockchip->phy) != -EPROBE_DEFER)
+ dev_err(dev, "missing phy\n");
+ return PTR_ERR(rockchip->phy);
+ }
+
+ return 0;
+}
/**
* rockchip_pcie_parse_dt - Parse Device Tree
@@ -883,12 +896,8 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
if (IS_ERR(rockchip->apb_base))
return PTR_ERR(rockchip->apb_base);
- rockchip->phy = devm_phy_get(dev, "pcie-phy");
- if (IS_ERR(rockchip->phy)) {
- if (PTR_ERR(rockchip->phy) != -EPROBE_DEFER)
- dev_err(dev, "missing phy\n");
+ if (rockchip_pcie_get_phys(rockchip))
return PTR_ERR(rockchip->phy);
- }
rockchip->lanes = 1;
err = of_property_read_u32(node, "num-lanes", &rockchip->lanes);
--
1.9.1
--
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next prev parent reply other threads:[~2017-07-17 7:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-17 7:36 [RFC PATCH v2 0/7] Reconstruct rockchip's PCIe and PCIe-PHY driver for per-lane PHY model Shawn Lin
[not found] ` <1500276982-208439-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-07-17 7:36 ` Shawn Lin [this message]
2017-07-17 7:36 ` [PATCH 2/7] PCI: rockchip: introduce per-lanes PHYs support Shawn Lin
[not found] ` <1500276982-208439-3-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-07-17 20:14 ` Brian Norris
[not found] ` <20170717201415.GB6856-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-07-18 2:36 ` Shawn Lin
2017-07-17 7:36 ` [PATCH 4/7] PCI: rockchip: idle the inactive PHY(s) Shawn Lin
2017-07-17 9:30 ` [RFC PATCH v2 0/7] Reconstruct rockchip's PCIe and PCIe-PHY driver for per-lane PHY model jeffy
2017-07-17 7:36 ` [PATCH 3/7] phy: rockcip-pcie: reconstruct driver to support per-lane PHYs Shawn Lin
2017-07-17 18:39 ` Brian Norris
[not found] ` <20170717183920.GA6856-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2017-07-18 1:30 ` Shawn Lin
2017-07-17 7:38 ` [PATCH 5/7] arm64: dts: rockchip: convert PCIe to use per-lane PHYs for rk3339 Shawn Lin
[not found] ` <1500277122-21835-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-07-17 7:38 ` [PATCH 6/7] dt-bindings: PCI: rockchip: convert to use per-lane PHY model Shawn Lin
[not found] ` <1500277122-21835-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-07-17 19:45 ` Rob Herring
2017-07-17 7:38 ` [PATCH 7/7] Documentation: bindings: convert to use per-lane Rockchip PCIe PHY Shawn Lin
[not found] ` <1500277122-21835-3-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-07-17 19:46 ` Rob Herring
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