devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Abhishek Sahu <absahu@codeaurora.org>
To: dwmw2@infradead.org, computersforpeace@gmail.com,
	boris.brezillon@free-electrons.com, marek.vasut@gmail.com,
	richard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org,
	mark.rutland@arm.com
Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	andy.gross@linaro.org, architt@codeaurora.org,
	sricharan@codeaurora.org, Abhishek Sahu <absahu@codeaurora.org>
Subject: [PATCH v2 11/25] mtd: nand: qcom: support for NAND controller properties
Date: Wed, 19 Jul 2017 17:17:59 +0530	[thread overview]
Message-ID: <1500464893-11352-12-git-send-email-absahu@codeaurora.org> (raw)
In-Reply-To: <1500464893-11352-1-git-send-email-absahu@codeaurora.org>

Currently driver data is being assigned directly with ECC modes.
Now, the plan is to add more NAND controller versions, so
reorganized the current driver data assignment by creating NAND
controller properties structure.  This will contain all
properties specific to NAND controller.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
 drivers/mtd/nand/qcom_nandc.c | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 8f9e86c..3b0ae91 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -235,7 +235,7 @@ struct nandc_regs {
  *				writes. contains the register values to be
  *				written to controller
  * @cmd1/vld:			some fixed controller register values
- * @ecc_modes:			supported ECC modes by the current controller,
+ * @props:			properties of current NAND controller IP,
  *				initialized via DT match data
  */
 struct qcom_nand_controller {
@@ -266,7 +266,7 @@ struct qcom_nand_controller {
 	struct nandc_regs *regs;
 
 	u32 cmd1, vld;
-	u32 ecc_modes;
+	const struct qcom_props *props;
 };
 
 /*
@@ -319,6 +319,15 @@ struct qcom_nand_host {
 	u32 clrreadstatus;
 };
 
+/*
+ * This data type corresponds to the nand controller properties which varies
+ * among different NAND controller IP's.
+ * @ecc_modes - ecc mode for NAND
+ */
+struct qcom_props {
+	u32 ecc_modes;
+};
+
 static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
 {
 	return container_of(chip, struct qcom_nand_host, chip);
@@ -1820,7 +1829,7 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
 		 * uses lesser bytes for ECC. If RS is used, the ECC bytes is
 		 * always 10 bytes
 		 */
-		if (nandc->ecc_modes & ECC_BCH_4BIT) {
+		if (nandc->props->ecc_modes & ECC_BCH_4BIT) {
 			/* BCH */
 			host->bch_enabled = true;
 			ecc_mode = 0;
@@ -2165,7 +2174,7 @@ static int qcom_nandc_probe(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
-	nandc->ecc_modes = (unsigned long)dev_data;
+	nandc->props = dev_data;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	nandc->base = devm_ioremap_resource(dev, res);
@@ -2234,7 +2243,9 @@ static int qcom_nandc_remove(struct platform_device *pdev)
 	return 0;
 }
 
-#define EBI2_NANDC_ECC_MODES	(ECC_RS_4BIT | ECC_BCH_8BIT)
+static const struct qcom_props ebi2_nandc_data = {
+	.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
+};
 
 /*
  * data will hold a struct pointer containing more differences once we support
@@ -2242,7 +2253,7 @@ static int qcom_nandc_remove(struct platform_device *pdev)
  */
 static const struct of_device_id qcom_nandc_of_match[] = {
 	{	.compatible = "qcom,ebi2-nandc",
-		.data = (void *)EBI2_NANDC_ECC_MODES,
+		.data = &ebi2_nandc_data,
 	},
 	{}
 };
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

  parent reply	other threads:[~2017-07-19 11:47 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-19 11:47 [PATCH v2 00/25] Add QCOM QPIC NAND support Abhishek Sahu
2017-07-19 11:47 ` [PATCH v2 01/25] mtd: nand: qcom: fix config error for BCH Abhishek Sahu
2017-08-02  5:47   ` Archit Taneja
2017-08-03 15:56   ` Boris Brezillon
2017-08-03 17:52     ` Abhishek Sahu
2017-08-03 18:47       ` Boris Brezillon
2017-08-03 19:02         ` Abhishek Sahu
2017-08-04  7:46   ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD_VLD register Abhishek Sahu
2017-08-02  5:49   ` Archit Taneja
2017-08-03 15:47   ` Boris Brezillon
2017-08-03 17:59     ` Abhishek Sahu
     [not found]   ` <1500464893-11352-3-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-03 15:48     ` Boris Brezillon
2017-08-03 17:54       ` Abhishek Sahu
2017-07-19 11:47 ` [PATCH v2 03/25] mtd: nand: qcom: change compatible string for EBI2 NANDC Abhishek Sahu
2017-07-19 11:47 ` [PATCH v2 05/25] mtd: nand: qcom: remove redundant chip select compatible string Abhishek Sahu
2017-08-02  5:51   ` Archit Taneja
2017-08-04  7:47   ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 06/25] dt-bindings: qcom_nandc: remove " Abhishek Sahu
2017-07-24 19:14   ` Rob Herring
2017-08-04  7:47   ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 07/25] mtd: nand: qcom: reorganize nand page read Abhishek Sahu
     [not found]   ` <1500464893-11352-8-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-02  5:56     ` Archit Taneja
2017-08-04  7:48     ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 08/25] mtd: nand: qcom: reorganize nand page write Abhishek Sahu
2017-08-02  6:01   ` Archit Taneja
2017-08-02 13:54     ` Abhishek Sahu
2017-08-04  7:48   ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 09/25] mtd: nand: qcom: remove memset for clearing read register buffer Abhishek Sahu
     [not found]   ` <1500464893-11352-10-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-02  6:06     ` Archit Taneja
2017-08-04  7:48   ` Boris Brezillon
2017-07-19 11:47 ` [PATCH v2 10/25] mtd: nand: qcom: reorganize nand devices probing Abhishek Sahu
     [not found]   ` <1500464893-11352-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-02  8:21     ` Archit Taneja
2017-08-02 13:56       ` Abhishek Sahu
     [not found]       ` <772b9720-cd17-0897-4ee1-836abb748f34-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-04  7:49         ` Boris Brezillon
2017-07-19 11:47 ` Abhishek Sahu [this message]
2017-08-02  8:31   ` [PATCH v2 11/25] mtd: nand: qcom: support for NAND controller properties Archit Taneja
2017-08-04  7:49   ` Boris Brezillon
2017-08-04  7:56     ` Boris Brezillon
2017-08-04 12:39   ` Boris Brezillon
2017-07-19 11:48 ` [PATCH v2 12/25] dt-bindings: qcom_nandc: QPIC NAND documentation Abhishek Sahu
     [not found]   ` <1500464893-11352-13-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-19 19:39     ` Boris Brezillon
2017-07-20  5:33       ` Abhishek Sahu
2017-07-24 19:17   ` Rob Herring
2017-07-25 18:43     ` Abhishek Sahu
2017-07-31 16:05       ` Abhishek Sahu
2017-08-04 12:45         ` Boris Brezillon
2017-08-04 13:11           ` Abhishek Sahu
2017-08-04 13:22             ` Boris Brezillon
2017-07-19 11:48 ` [PATCH v2 13/25] mtd: nand: qcom: add QPIC NAND compatible string Abhishek Sahu
2017-08-02  8:36   ` Archit Taneja
2017-07-19 11:48 ` [PATCH v2 14/25] mtd: nand: qcom: add and initialize QPIC DMA resources Abhishek Sahu
2017-08-02  8:41   ` Archit Taneja
2017-08-02 13:59     ` Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 15/25] mtd: nand: qcom: DMA mapping support for register read buffer Abhishek Sahu
     [not found]   ` <1500464893-11352-16-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-04  5:26     ` Archit Taneja
     [not found] ` <1500464893-11352-1-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-19 11:47   ` [PATCH v2 04/25] dt-bindings: qcom_nandc: change compatible string for EBI2 NANDC Abhishek Sahu
2017-07-24 19:13     ` Rob Herring
2017-07-19 11:48   ` [PATCH v2 16/25] mtd: nand: qcom: allocate BAM transaction Abhishek Sahu
     [not found]     ` <1500464893-11352-17-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-21 20:28       ` kbuild test robot
2017-08-04  5:43     ` Archit Taneja
2017-07-19 11:48 ` [PATCH v2 17/25] mtd: nand: qcom: add BAM DMA descriptor handling Abhishek Sahu
     [not found]   ` <1500464893-11352-18-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-04  5:54     ` Archit Taneja
2017-07-19 11:48 ` [PATCH v2 18/25] mtd: nand: qcom: support for passing flags in transfer functions Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 19/25] mtd: nand: qcom: support for read location registers Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 20/25] mtd: nand: qcom: erased codeword detection configuration Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 21/25] mtd: nand: qcom: support for QPIC page read/write Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 22/25] mtd: nand: qcom: QPIC raw write support Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 23/25] mtd: nand: qcom: change register offset defines with enums Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 24/25] dt-bindings: qcom_nandc: compatible string for version 1.5.0 Abhishek Sahu
2017-07-19 11:48 ` [PATCH v2 25/25] mtd: nand: qcom: support for QPIC " Abhishek Sahu
2017-08-04  7:53 ` [PATCH v2 00/25] Add QCOM QPIC NAND support Boris Brezillon
2017-08-04  7:55   ` Boris Brezillon
2017-08-04  8:47     ` Abhishek Sahu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1500464893-11352-12-git-send-email-absahu@codeaurora.org \
    --to=absahu@codeaurora.org \
    --cc=andy.gross@linaro.org \
    --cc=architt@codeaurora.org \
    --cc=boris.brezillon@free-electrons.com \
    --cc=computersforpeace@gmail.com \
    --cc=cyrille.pitchen@wedev4u.fr \
    --cc=devicetree@vger.kernel.org \
    --cc=dwmw2@infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=marek.vasut@gmail.com \
    --cc=mark.rutland@arm.com \
    --cc=richard@nod.at \
    --cc=robh+dt@kernel.org \
    --cc=sricharan@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).