[PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes

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* [PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes
@ 2017-07-31 21:54 Jon Mason
  2017-07-31 21:54 ` [PATCH v2 1/3] ARM: dts: NSP: Add dma-coherent to relevant DT entries Jon Mason
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Jon Mason @ 2017-07-31 21:54 UTC (permalink / raw)
  To: Florian Fainelli, Rob Herring, Mark Rutland
  Cc: bcm-kernel-feedback-list, devicetree, linux-arm-kernel,
	linux-kernel, Jon Mason

Changes in v2:
* Removed pl330 and srab dma-coherent entries due to concerns that they
  were invalid

Add dma-coherent to the relevant DT entries, and add USB3 support

Jon Mason (3):
  ARM: dts: NSP: Add dma-coherent to relevant DT entries
  ARM: dts: NSP: Rearrage USB entries
  ARM: dts: NSP: Add USB3 and USB3 PHY to NSP

 arch/arm/boot/dts/bcm-nsp.dtsi     | 59 +++++++++++++++++++++++++++++---------
 arch/arm/boot/dts/bcm958522er.dts  |  8 ++++++
 arch/arm/boot/dts/bcm958525er.dts  |  8 ++++++
 arch/arm/boot/dts/bcm958525xmc.dts |  8 ++++++
 arch/arm/boot/dts/bcm958622hr.dts  |  8 ++++++
 arch/arm/boot/dts/bcm958623hr.dts  |  8 ++++++
 arch/arm/boot/dts/bcm958625hr.dts  |  8 ++++++
 arch/arm/boot/dts/bcm958625k.dts   |  8 ++++++
 8 files changed, 101 insertions(+), 14 deletions(-)

-- 
2.7.4

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH v2 1/3] ARM: dts: NSP: Add dma-coherent to relevant DT entries
  2017-07-31 21:54 [PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes Jon Mason
@ 2017-07-31 21:54 ` Jon Mason
  2017-07-31 21:54 ` [PATCH v2 2/3] ARM: dts: NSP: Rearrage USB entries Jon Mason
  2017-07-31 21:54 ` [PATCH v2 3/3] ARM: dts: NSP: Add USB3 and USB3 PHY to NSP Jon Mason
  2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2017-07-31 21:54 UTC (permalink / raw)
  To: Florian Fainelli, Rob Herring, Mark Rutland
  Cc: bcm-kernel-feedback-list, devicetree, linux-arm-kernel,
	linux-kernel, Jon Mason

Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries.  Adding it here to correct the issue.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: 3107fa5bcfb2 ("ARM: dts: NSP: Add SD/MMC support")
Fixes: 13d04f20935c ("ARM: dts: NSP: Add AMAC entries")
Fixes: 5aeda7bf8a1e ("ARM: dts: NSP: Add and enable amac2")
Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Fixes: 1d8ece6639e1 ("ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree")
Fixes: 0f9f27a36d09 ("ARM: dts: NSP: Add I2C support to the DT")
Fixes: 8dbcad020f2e ("ARM: dts: nsp: Add sata device tree entry")
Fixes: 522199029fdc ("ARM: dts: NSP: Fix PCIE DT issue")
---
 arch/arm/boot/dts/bcm-nsp.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 7204d1def23d..c82313a677d9 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -215,6 +215,7 @@
 			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 			sdhci,auto-cmd12;
 			clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -224,6 +225,7 @@
 			      <0x110000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -233,6 +235,7 @@
 			      <0x111000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -242,6 +245,7 @@
 			      <0x112000 0x1000>;
 			reg-names = "amac_base", "idm_base";
 			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -252,6 +256,7 @@
 			#mbox-cells = <1>;
 			brcm,rx-status-len = <32>;
 			brcm,use-bcm-hdr;
+			dma-coherent;
 		};
 
 		nand: nand@26000 {
@@ -325,6 +330,7 @@
 			compatible = "generic-ehci";
 			reg = <0x2a000 0x100>;
 			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -332,6 +338,7 @@
 			compatible = "generic-ohci";
 			reg = <0x2b000 0x100>;
 			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -376,6 +383,7 @@
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
 			clock-frequency = <100000>;
+			dma-coherent;
 			status = "disabled";
 		};
 
@@ -446,6 +454,7 @@
 			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			dma-coherent;
 			status = "disabled";
 
 			sata0: sata-port@0 {
@@ -483,6 +492,7 @@
 		 */
 		ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
 
+		dma-coherent;
 		status = "disabled";
 
 		msi-parent = <&msi0>;
@@ -519,6 +529,7 @@
 		 */
 		ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
 
+		dma-coherent;
 		status = "disabled";
 
 		msi-parent = <&msi1>;
@@ -555,6 +566,7 @@
 		 */
 		ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
 
+		dma-coherent;
 		status = "disabled";
 
 		msi-parent = <&msi2>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v2 2/3] ARM: dts: NSP: Rearrage USB entries
  2017-07-31 21:54 [PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes Jon Mason
  2017-07-31 21:54 ` [PATCH v2 1/3] ARM: dts: NSP: Add dma-coherent to relevant DT entries Jon Mason
@ 2017-07-31 21:54 ` Jon Mason
  2017-07-31 21:54 ` [PATCH v2 3/3] ARM: dts: NSP: Add USB3 and USB3 PHY to NSP Jon Mason
  2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2017-07-31 21:54 UTC (permalink / raw)
  To: Florian Fainelli, Rob Herring, Mark Rutland
  Cc: bcm-kernel-feedback-list, devicetree, linux-arm-kernel,
	linux-kernel, Jon Mason

The rest of the DTSI file is in incrementing addresses, but the USB
OHCI/ECHI entries are out of sequence.  Move them to put them in the
proper place.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
 arch/arm/boot/dts/bcm-nsp.dtsi | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c82313a677d9..9feb3689d191 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -302,6 +302,22 @@
 			#size-cells = <0>;
 		};
 
+		ehci0: usb@2a000 {
+			compatible = "generic-ehci";
+			reg = <0x2a000 0x100>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
+			status = "disabled";
+		};
+
+		ohci0: usb@2b000 {
+			compatible = "generic-ohci";
+			reg = <0x2b000 0x100>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			dma-coherent;
+			status = "disabled";
+		};
+
 		crypto@2f000 {
 			compatible = "brcm,spum-nsp-crypto";
 			reg = <0x2f000 0x900>;
@@ -326,22 +342,6 @@
 			status = "disabled";
 		};
 
-		ehci0: usb@2a000 {
-			compatible = "generic-ehci";
-			reg = <0x2a000 0x100>;
-			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-			dma-coherent;
-			status = "disabled";
-		};
-
-		ohci0: usb@2b000 {
-			compatible = "generic-ohci";
-			reg = <0x2b000 0x100>;
-			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-			dma-coherent;
-			status = "disabled";
-		};
-
 		rng: rng@33000 {
 			compatible = "brcm,bcm-nsp-rng";
 			reg = <0x33000 0x14>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v2 3/3] ARM: dts: NSP: Add USB3 and USB3 PHY to NSP
  2017-07-31 21:54 [PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes Jon Mason
  2017-07-31 21:54 ` [PATCH v2 1/3] ARM: dts: NSP: Add dma-coherent to relevant DT entries Jon Mason
  2017-07-31 21:54 ` [PATCH v2 2/3] ARM: dts: NSP: Rearrage USB entries Jon Mason
@ 2017-07-31 21:54 ` Jon Mason
  2 siblings, 0 replies; 4+ messages in thread
From: Jon Mason @ 2017-07-31 21:54 UTC (permalink / raw)
  To: Florian Fainelli, Rob Herring, Mark Rutland
  Cc: bcm-kernel-feedback-list, devicetree, linux-arm-kernel,
	linux-kernel, Jon Mason

This uses the existing Northstar USB3 PHY driver to enable the USB3
ports on NSP.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
 arch/arm/boot/dts/bcm-nsp.dtsi     | 19 +++++++++++++++++++
 arch/arm/boot/dts/bcm958522er.dts  |  8 ++++++++
 arch/arm/boot/dts/bcm958525er.dts  |  8 ++++++++
 arch/arm/boot/dts/bcm958525xmc.dts |  8 ++++++++
 arch/arm/boot/dts/bcm958622hr.dts  |  8 ++++++++
 arch/arm/boot/dts/bcm958623hr.dts  |  8 ++++++++
 arch/arm/boot/dts/bcm958625hr.dts  |  8 ++++++++
 arch/arm/boot/dts/bcm958625k.dts   |  8 ++++++++
 8 files changed, 75 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 9feb3689d191..dff66974feed 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -302,6 +302,16 @@
 			#size-cells = <0>;
 		};
 
+		xhci: usb@29000 {
+			compatible = "generic-xhci";
+			reg = <0x29000 0x1000>;
+			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&usb3_phy>;
+			phy-names = "usb3-phy";
+			dma-coherent;
+			status = "disabled";
+		};
+
 		ehci0: usb@2a000 {
 			compatible = "generic-ehci";
 			reg = <0x2a000 0x100>;
@@ -469,6 +479,15 @@
 				phy-names = "sata-phy";
 			};
 		};
+
+		usb3_phy: usb3-phy@104000 {
+			compatible = "brcm,ns-bx-usb3-phy";
+			reg = <0x104000 0x1000>,
+			      <0x032000 0x1000>;
+			reg-names = "dmp", "ccb-mii";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
 	};
 
 	pcie0: pcie@18012000 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index f5c42962c201..f9dd342cc2ae 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -170,3 +170,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index efcb1f67bdad..374508a9cfbf 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -182,3 +182,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index b335ce02e32f..403250c5ad8e 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -202,3 +202,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index 16ab2d82a14b..fd8b8c689ffe 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -219,3 +219,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 9b921c6aa8f8..3bc50849d013 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -227,3 +227,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 006b08e41a3b..d94d14b3c745 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -229,3 +229,11 @@
 &uart0 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 64740f85cf4c..2cf2392483b2 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -264,3 +264,11 @@
 &uart1 {
 	status = "okay";
 };
+
+&usb3_phy {
+	status = "okay";
+};
+
+&xhci {
+	status = "okay";
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-07-31 21:54 UTC | newest]

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2017-07-31 21:54 [PATCH v2 0/3] ARM: dts: NSP: dma-coherent and USB3 changes Jon Mason
2017-07-31 21:54 ` [PATCH v2 1/3] ARM: dts: NSP: Add dma-coherent to relevant DT entries Jon Mason
2017-07-31 21:54 ` [PATCH v2 2/3] ARM: dts: NSP: Rearrage USB entries Jon Mason
2017-07-31 21:54 ` [PATCH v2 3/3] ARM: dts: NSP: Add USB3 and USB3 PHY to NSP Jon Mason

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