* [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM
@ 2017-08-03 10:32 Jacob Chen
2017-08-03 10:32 ` [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board Jacob Chen
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Jacob Chen @ 2017-08-03 10:32 UTC (permalink / raw)
To: linux-rockchip
Cc: linux-kernel, linux-arm-kernel, devicetree, heiko, kever.yang,
mark.yao, zhangqing, Jacob Chen
Add support for the rk3399 sapphire SOM board.
This board works in a combination with the excavator main board.
You can get more info from below link:
http://opensource.rock-chips.com/wiki_Excavator_sapphire_board
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 646 ++++++++++++++++++++++
1 file changed, 646 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
new file mode 100644
index 0000000..4c6b369
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -0,0 +1,646 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "dt-bindings/pwm/pwm.h"
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm0 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ dc_12v: dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ /* switched by pmic_sleep */
+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_1v8>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc1v8_pmu>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-name = "vdd_center";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-name = "vcc1v8_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v0_tp: LDO_REG2 {
+ regulator-name = "vcc3v0_tp";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-name = "vcc1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio: LDO_REG4 {
+ regulator-name = "vcc_sdio";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-name = "vcca3v0_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-name = "vcc_1v5";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-name = "vcca1v8_codec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-name = "vcc_3v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
+ regulator-name = "vcc3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-name = "vcc3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ vin-supply = <&vcc_sys>;
+ };
+};
+
+&i2c3 {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc_3v0>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sdio>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
+ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
+ assigned-clock-rates = <100000000>;
+ ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
+ num-lanes = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqn>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pinctrl {
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins =
+ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pmic_dvs2: pmic-dvs2 {
+ rockchip,pins =
+ <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel1_gpio: vsel1-gpio {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_gpio: vsel2-gpio {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins =
+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca1v8_s3>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ keep-power-in-suspend;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
+&sdio0 {
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ bus-width = <4>;
+ disable-wp;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ clock-frequency = <150000000>;
+ clock-freq-min-max = <100000 150000000>;
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ vqmmc-supply = <&vcc_sdio>;
+ status = "okay";
+};
+
+&tsadc {
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy1_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board 2017-08-03 10:32 [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM Jacob Chen @ 2017-08-03 10:32 ` Jacob Chen 2017-08-03 21:28 ` kbuild test robot 2017-08-06 15:44 ` Heiko Stuebner [not found] ` <1501756357-10511-1-git-send-email-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> 2017-08-06 15:41 ` Heiko Stuebner 2 siblings, 2 replies; 8+ messages in thread From: Jacob Chen @ 2017-08-03 10:32 UTC (permalink / raw) To: linux-rockchip Cc: linux-kernel, linux-arm-kernel, devicetree, heiko, kever.yang, mark.yao, zhangqing, Jacob Chen Add support for the rk3399 excavator main board. This board works in a combination with the sapphire SOM. This board have been sold as the rk3399 evaluation board for commercial customers. You can get more info from below link: http://opensource.rock-chips.com/wiki_Excavator_sapphire_board Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3399-sapphire-excavator.dts | 241 +++++++++++++++++++++ 2 files changed, 242 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index bcfa53b..d0ad366 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb always := $(dtb-y) subdir-y := $(dts-dirs) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts new file mode 100644 index 0000000..3f4701e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include "rk3399-sapphire.dtsi" + +/ { + model = "Excavator-RK3399 Board"; + compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + button-up { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <100000>; + }; + + button-down { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <300000>; + }; + + back { + label = "Back"; + linux,code = <KEY_BACK>; + press-threshold-microvolt = <985000>; + }; + + menu { + label = "Menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <1314000>; + }; + }; + + edp_panel: edp-panel { + compatible ="lg,lp079qx1-sp0v", "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_s0>; + enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_panel_reset>; + + ports { + panel_in_edp: endpoint { + remote-endpoint = <&edp_out_panel>; + }; + }; + }; + + keys: gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + power { + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = <KEY_POWER>; + linux,input-type = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_btn>; + wakeup-source; + debounce-interval = <100>; + }; + }; + + rt5651-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "realtek,rt5651-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + simple-audio-card,cpu { + sound-dai = <&i2s0>; + }; + simple-audio-card,codec { + sound-dai = <&rt5651>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; +}; + +&backlight { + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&edp { + status = "okay"; + + ports { + edp_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + edp_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_edp>; + }; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; + + rt5651: rt5651@1a { + #sound-dai-cells = <0>; + compatible = "rockchip,rt5651"; + reg = <0x1a>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + accelerometer@68 { + compatible = "invensense,mpu6500"; + reg = <0x68>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + #sound-dai-cells = <0>; + status = "okay"; +}; + +&i2s2 { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwr_btn: pwr-btn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&spdif { + pinctrl-0 = <&spdif_bus>; + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + #sound-dai-cells = <0>; + status = "okay"; +}; -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board 2017-08-03 10:32 ` [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board Jacob Chen @ 2017-08-03 21:28 ` kbuild test robot 2017-08-06 15:46 ` Heiko Stuebner 2017-08-06 15:44 ` Heiko Stuebner 1 sibling, 1 reply; 8+ messages in thread From: kbuild test robot @ 2017-08-03 21:28 UTC (permalink / raw) Cc: kbuild-all, linux-rockchip, linux-kernel, linux-arm-kernel, devicetree, heiko, kever.yang, mark.yao, zhangqing, Jacob Chen [-- Attachment #1: Type: text/plain, Size: 1625 bytes --] Hi Jacob, [auto build test ERROR on rockchip/for-next] [also build test ERROR on v4.13-rc3 next-20170803] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Jacob-Chen/arm64-dts-rockchip-Add-support-for-rk3399-sapphire-SOM/20170804-002840 base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm64 All errors (new ones prefixed by >>): >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:197.1-6 Label or path hdmi not found >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:632.1-6 Label or path vopb not found >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:636.1-10 Label or path vopb_mmu not found >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:640.1-6 Label or path vopl not found >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:644.1-10 Label or path vopl_mmu not found >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts:157.1-5 Label or path edp not found FATAL ERROR: Syntax error parsing input tree --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 36243 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board 2017-08-03 21:28 ` kbuild test robot @ 2017-08-06 15:46 ` Heiko Stuebner 0 siblings, 0 replies; 8+ messages in thread From: Heiko Stuebner @ 2017-08-06 15:46 UTC (permalink / raw) To: kbuild test robot Cc: Jacob Chen, kbuild-all, linux-rockchip, linux-kernel, linux-arm-kernel, devicetree, kever.yang, mark.yao, zhangqing Am Freitag, 4. August 2017, 05:28:40 CEST schrieb kbuild test robot: > Hi Jacob, > > [auto build test ERROR on rockchip/for-next] > [also build test ERROR on v4.13-rc3 next-20170803] > [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] > > url: https://github.com/0day-ci/linux/commits/Jacob-Chen/arm64-dts-rockchip-Add-support-for-rk3399-sapphire-SOM/20170804-002840 > base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next > config: arm64-defconfig (attached as .config) > compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705 > reproduce: > wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > make.cross ARCH=arm64 > > All errors (new ones prefixed by >>): > > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:197.1-6 Label or path hdmi not found > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:632.1-6 Label or path vopb not found > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:636.1-10 Label or path vopb_mmu not found > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:640.1-6 Label or path vopl not found > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi:644.1-10 Label or path vopl_mmu not found > >> Error: arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts:157.1-5 Label or path edp not found > FATAL ERROR: Syntax error parsing input tree that's ok, it just depended on the series from Jacob adding these display-related nodes and I've applied that series before picking up this new board, so everything still compiles fine. Heiko ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board 2017-08-03 10:32 ` [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board Jacob Chen 2017-08-03 21:28 ` kbuild test robot @ 2017-08-06 15:44 ` Heiko Stuebner 1 sibling, 0 replies; 8+ messages in thread From: Heiko Stuebner @ 2017-08-06 15:44 UTC (permalink / raw) To: Jacob Chen Cc: linux-rockchip, linux-kernel, linux-arm-kernel, devicetree, kever.yang, mark.yao, zhangqing Am Donnerstag, 3. August 2017, 18:32:37 CEST schrieb Jacob Chen: > Add support for the rk3399 excavator main board. > This board works in a combination with the sapphire SOM. > > This board have been sold as the rk3399 evaluation board for commercial customers. > You can get more info from below link: > http://opensource.rock-chips.com/wiki_Excavator_sapphire_board > > Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> > +&spdif { > + pinctrl-0 = <&spdif_bus>; part of the core spdif node in rk3399 so dropped this one > + i2c-scl-rising-time-ns = <450>; > + i2c-scl-falling-time-ns = <15>; > + #sound-dai-cells = <0>; > + status = "okay"; > +}; applied for 4.14 with the above and some property reordering. I've also added an entry to Documentation/devicetree/bindings/arm/rockchip.txt for the board. When adding future boards, please always also add an entry for that. Thanks Heiko ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <1501756357-10511-1-git-send-email-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM [not found] ` <1501756357-10511-1-git-send-email-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> @ 2017-08-03 10:34 ` Jacob Chen [not found] ` <CAFLEztQOD5rkDRyL9es4vkyFDX-S+WqVuVUH+q4N6YvSaKmoXw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 0 siblings, 1 reply; 8+ messages in thread From: Jacob Chen @ 2017-08-03 10:34 UTC (permalink / raw) To: open list:ARM/Rockchip SoC... Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner, Kever Yang, long jacob, Elaine Zhang, Jacob Chen Hi all, 2017-08-03 18:32 GMT+08:00 Jacob Chen <jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org>: > Add support for the rk3399 sapphire SOM board. > This board works in a combination with the excavator main board. > > You can get more info from below link: > http://opensource.rock-chips.com/wiki_Excavator_sapphire_board > > Signed-off-by: Jacob Chen <jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> > --- > arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 646 ++++++++++++++++++++++ > 1 file changed, 646 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi > new file mode 100644 > index 0000000..4c6b369 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi > @@ -0,0 +1,646 @@ > +/* > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of the > + * License, or (at your option) any later version. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +#include "dt-bindings/pwm/pwm.h" > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + pwms = <&pwm0 0 25000 0>; > + brightness-levels = < > + 0 1 2 3 4 5 6 7 > + 8 9 10 11 12 13 14 15 > + 16 17 18 19 20 21 22 23 > + 24 25 26 27 28 29 30 31 > + 32 33 34 35 36 37 38 39 > + 40 41 42 43 44 45 46 47 > + 48 49 50 51 52 53 54 55 > + 56 57 58 59 60 61 62 63 > + 64 65 66 67 68 69 70 71 > + 72 73 74 75 76 77 78 79 > + 80 81 82 83 84 85 86 87 > + 88 89 90 91 92 93 94 95 > + 96 97 98 99 100 101 102 103 > + 104 105 106 107 108 109 110 111 > + 112 113 114 115 116 117 118 119 > + 120 121 122 123 124 125 126 127 > + 128 129 130 131 132 133 134 135 > + 136 137 138 139 140 141 142 143 > + 144 145 146 147 148 149 150 151 > + 152 153 154 155 156 157 158 159 > + 160 161 162 163 164 165 166 167 > + 168 169 170 171 172 173 174 175 > + 176 177 178 179 180 181 182 183 > + 184 185 186 187 188 189 190 191 > + 192 193 194 195 196 197 198 199 > + 200 201 202 203 204 205 206 207 > + 208 209 210 211 212 213 214 215 > + 216 217 218 219 220 221 222 223 > + 224 225 226 227 228 229 230 231 > + 232 233 234 235 236 237 238 239 > + 240 241 242 243 244 245 246 247 > + 248 249 250 251 252 253 254 255>; > + default-brightness-level = <200>; > + }; > + > + clkin_gmac: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "clkin_gmac"; > + #clock-cells = <0>; > + }; > + > + dc_12v: dc-12v { > + compatible = "regulator-fixed"; > + regulator-name = "dc_12v"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + /* switched by pmic_sleep */ > + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc1v8_s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_1v8>; > + }; > + > + vcc3v3_sys: vcc3v3-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_host: vcc5v0-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_host_en>; > + regulator-name = "vcc5v0_host"; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&gmac { > + assigned-clocks = <&cru SCLK_RMII_SRC>; > + assigned-clock-parents = <&clkin_gmac>; > + clock_in_out = "input"; > + phy-supply = <&vcc_lan>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii_pins>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + tx_delay = <0x28>; > + rx_delay = <0x11>; > + status = "okay"; > +}; > + > +&gpu { > + mali-supply = <&vdd_gpu>; > + status = "okay"; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&i2c3>; > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + rk808: pmic@1b { > + compatible = "rockchip,rk808"; > + reg = <0x1b>; > + interrupt-parent = <&gpio1>; > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + clock-output-names = "xin32k", "rk808-clkout2"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l &pmic_dvs2>; > + rockchip,system-power-controller; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc6-supply = <&vcc_sys>; > + vcc7-supply = <&vcc_sys>; > + vcc8-supply = <&vcc3v3_sys>; > + vcc9-supply = <&vcc_sys>; > + vcc10-supply = <&vcc_sys>; > + vcc11-supply = <&vcc_sys>; > + vcc12-supply = <&vcc3v3_sys>; > + vddio-supply = <&vcc1v8_pmu>; > + > + regulators { > + vdd_center: DCDC_REG1 { > + regulator-name = "vdd_center"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_cpu_l: DCDC_REG2 { > + regulator-name = "vdd_cpu_l"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v8: DCDC_REG4 { > + regulator-name = "vcc_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc1v8_dvp: LDO_REG1 { > + regulator-name = "vcc1v8_dvp"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v0_tp: LDO_REG2 { > + regulator-name = "vcc3v0_tp"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc1v8_pmu: LDO_REG3 { > + regulator-name = "vcc1v8_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc_sdio: LDO_REG4 { > + regulator-name = "vcc_sdio"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcca3v0_codec: LDO_REG5 { > + regulator-name = "vcca3v0_codec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v5: LDO_REG6 { > + regulator-name = "vcc_1v5"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1500000>; > + }; > + }; > + > + vcca1v8_codec: LDO_REG7 { > + regulator-name = "vcca1v8_codec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_3v0: LDO_REG8 { > + regulator-name = "vcc_3v0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3000000>; > + }; > + }; > + > + vcc3v3_s3: vcc_lan: SWITCH_REG1 { > + regulator-name = "vcc3v3_s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_s0: SWITCH_REG2 { > + regulator-name = "vcc3v3_s0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > + > + vdd_cpu_b: regulator@40 { > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <1>; > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: regulator@41 { > + compatible = "silergy,syr828"; > + reg = <0x41>; > + fcs,suspend-voltage-selector = <1>; > + regulator-name = "vdd_gpu"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_log: vdd-log { > + compatible = "pwm-regulator"; > + pwms = <&pwm2 0 25000 1>; > + regulator-name = "vdd_log"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + vin-supply = <&vcc_sys>; > + }; > +}; > + > +&i2c3 { > + i2c-scl-rising-time-ns = <450>; > + i2c-scl-falling-time-ns = <15>; > + status = "okay"; > +}; > + > +&io_domains { > + status = "okay"; > + > + bt656-supply = <&vcc_3v0>; > + audio-supply = <&vcca1v8_codec>; > + sdmmc-supply = <&vcc_sdio>; > + gpio1830-supply = <&vcc_3v0>; > +}; > + > +&pcie_phy { > + status = "okay"; > +}; > + > +&pcie0 { > + assigned-clocks = <&cru SCLK_PCIEPHY_REF>; > + assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; > + assigned-clock-rates = <100000000>; > + ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; > + num-lanes = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_clkreqn>; > + status = "okay"; > +}; > + > +&pmu_io_domains { > + pmu1830-supply = <&vcc_3v0>; > + status = "okay"; > +}; > + > +&pinctrl { > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = > + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + pmic_dvs2: pmic-dvs2 { > + rockchip,pins = > + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + vsel1_gpio: vsel1-gpio { > + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + vsel2_gpio: vsel2-gpio { > + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; > + > + usb2 { > + vcc5v0_host_en: vcc5v0-host-en { > + rockchip,pins = > + <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pwm0 { > + status = "okay"; > +}; > + > +&pwm2 { > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcca1v8_s3>; > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + keep-power-in-suspend; > + mmc-hs400-1_8v; > + mmc-hs400-enhanced-strobe; > + non-removable; > + status = "okay"; > +}; > + > +&sdio0 { > + clock-frequency = <50000000>; > + clock-freq-min-max = <200000 50000000>; > + bus-width = <4>; > + disable-wp; > + cap-sd-highspeed; > + cap-sdio-irq; > + keep-power-in-suspend; > + mmc-pwrseq = <&sdio_pwrseq>; > + non-removable; > + num-slots = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; > + sd-uhs-sdr104; > + status = "okay"; > +}; > + > +&sdmmc { > + clock-frequency = <150000000>; > + clock-freq-min-max = <100000 150000000>; > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + disable-wp; > + num-slots = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; > + vqmmc-supply = <&vcc_sdio>; > + status = "okay"; > +}; > + > +&tsadc { > + /* tshut mode 0:CRU 1:GPIO */ > + rockchip,hw-tshut-mode = <1>; > + /* tshut polarity 0:LOW 1:HIGH */ > + rockchip,hw-tshut-polarity = <1>; > + status = "okay"; > +}; > + > +&u2phy0 { > + status = "okay"; > + > + u2phy0_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy0_host: host-port { > + phy-supply = <&vcc5v0_host>; > + status = "okay"; > + }; > +}; > + > +&u2phy1 { > + status = "okay"; > + > + u2phy1_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy1_host: host-port { > + phy-supply = <&vcc5v0_host>; > + status = "okay"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_xfer &uart0_cts>; > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb_host1_ehci { > + status = "okay"; > +}; > + > +&usb_host1_ohci { > + status = "okay"; > +}; > + > +&usbdrd3_0 { > + status = "okay"; > +}; > + > +&usbdrd_dwc3_0 { > + status = "okay"; > + dr_mode = "otg"; > +}; > + > +&usbdrd3_1 { > + status = "okay"; > +}; > + > +&usbdrd_dwc3_1 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&vopb { > + status = "okay"; > +}; > + > +&vopb_mmu { > + status = "okay"; > +}; > + > +&vopl { > + status = "okay"; > +}; > + > +&vopl_mmu { > + status = "okay"; > +}; > -- > 2.7.4 > http://imgur.com/a/6K0t8 I can have display in this board, but need some assigned clock-rate assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; assigned-clock-rates = <400000000>, <200000000>; assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; assigned-clock-rates = <400000000>, <200000000>; Is it a issue? Are there any pacthes in 4.14 will fix it? -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <CAFLEztQOD5rkDRyL9es4vkyFDX-S+WqVuVUH+q4N6YvSaKmoXw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM [not found] ` <CAFLEztQOD5rkDRyL9es4vkyFDX-S+WqVuVUH+q4N6YvSaKmoXw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> @ 2017-08-04 9:51 ` Jacob Chen 0 siblings, 0 replies; 8+ messages in thread From: Jacob Chen @ 2017-08-04 9:51 UTC (permalink / raw) To: open list:ARM/Rockchip SoC... Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner, Kever Yang, long jacob, Elaine Zhang, Jacob Chen 2017-08-03 18:34 GMT+08:00 Jacob Chen <jacobchen110-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>: > Hi all, > > 2017-08-03 18:32 GMT+08:00 Jacob Chen <jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org>: >> Add support for the rk3399 sapphire SOM board. >> This board works in a combination with the excavator main board. >> >> You can get more info from below link: >> http://opensource.rock-chips.com/wiki_Excavator_sapphire_board >> >> Signed-off-by: Jacob Chen <jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> >> --- >> arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 646 ++++++++++++++++++++++ >> 1 file changed, 646 insertions(+) >> create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi >> new file mode 100644 >> index 0000000..4c6b369 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi >> @@ -0,0 +1,646 @@ >> +/* >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. >> + * >> + * This file is dual-licensed: you can use it either under the terms >> + * of the GPL or the X11 license, at your option. Note that this dual >> + * licensing only applies to this file, and not this project as a >> + * whole. >> + * >> + * a) This file is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of the >> + * License, or (at your option) any later version. >> + * >> + * This file is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * Or, alternatively, >> + * >> + * b) Permission is hereby granted, free of charge, to any person >> + * obtaining a copy of this software and associated documentation >> + * files (the "Software"), to deal in the Software without >> + * restriction, including without limitation the rights to use, >> + * copy, modify, merge, publish, distribute, sublicense, and/or >> + * sell copies of the Software, and to permit persons to whom the >> + * Software is furnished to do so, subject to the following >> + * conditions: >> + * >> + * The above copyright notice and this permission notice shall be >> + * included in all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES >> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND >> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT >> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR >> + * OTHER DEALINGS IN THE SOFTWARE. >> + */ >> + >> +#include "dt-bindings/pwm/pwm.h" >> +#include "rk3399.dtsi" >> +#include "rk3399-opp.dtsi" >> + >> +/ { >> + compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; >> + >> + backlight: backlight { >> + compatible = "pwm-backlight"; >> + pwms = <&pwm0 0 25000 0>; >> + brightness-levels = < >> + 0 1 2 3 4 5 6 7 >> + 8 9 10 11 12 13 14 15 >> + 16 17 18 19 20 21 22 23 >> + 24 25 26 27 28 29 30 31 >> + 32 33 34 35 36 37 38 39 >> + 40 41 42 43 44 45 46 47 >> + 48 49 50 51 52 53 54 55 >> + 56 57 58 59 60 61 62 63 >> + 64 65 66 67 68 69 70 71 >> + 72 73 74 75 76 77 78 79 >> + 80 81 82 83 84 85 86 87 >> + 88 89 90 91 92 93 94 95 >> + 96 97 98 99 100 101 102 103 >> + 104 105 106 107 108 109 110 111 >> + 112 113 114 115 116 117 118 119 >> + 120 121 122 123 124 125 126 127 >> + 128 129 130 131 132 133 134 135 >> + 136 137 138 139 140 141 142 143 >> + 144 145 146 147 148 149 150 151 >> + 152 153 154 155 156 157 158 159 >> + 160 161 162 163 164 165 166 167 >> + 168 169 170 171 172 173 174 175 >> + 176 177 178 179 180 181 182 183 >> + 184 185 186 187 188 189 190 191 >> + 192 193 194 195 196 197 198 199 >> + 200 201 202 203 204 205 206 207 >> + 208 209 210 211 212 213 214 215 >> + 216 217 218 219 220 221 222 223 >> + 224 225 226 227 228 229 230 231 >> + 232 233 234 235 236 237 238 239 >> + 240 241 242 243 244 245 246 247 >> + 248 249 250 251 252 253 254 255>; >> + default-brightness-level = <200>; >> + }; >> + >> + clkin_gmac: external-gmac-clock { >> + compatible = "fixed-clock"; >> + clock-frequency = <125000000>; >> + clock-output-names = "clkin_gmac"; >> + #clock-cells = <0>; >> + }; >> + >> + dc_12v: dc-12v { >> + compatible = "regulator-fixed"; >> + regulator-name = "dc_12v"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <12000000>; >> + regulator-max-microvolt = <12000000>; >> + }; >> + >> + /* switched by pmic_sleep */ >> + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { >> + compatible = "regulator-fixed"; >> + regulator-name = "vcc1v8_s3"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + vin-supply = <&vcc_1v8>; >> + }; >> + >> + vcc3v3_sys: vcc3v3-sys { >> + compatible = "regulator-fixed"; >> + regulator-name = "vcc3v3_sys"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + vin-supply = <&vcc_sys>; >> + }; >> + >> + vcc_sys: vcc-sys { >> + compatible = "regulator-fixed"; >> + regulator-name = "vcc_sys"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + vin-supply = <&dc_12v>; >> + }; >> + >> + vcc5v0_host: vcc5v0-host-regulator { >> + compatible = "regulator-fixed"; >> + enable-active-high; >> + gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&vcc5v0_host_en>; >> + regulator-name = "vcc5v0_host"; >> + regulator-always-on; >> + vin-supply = <&vcc_sys>; >> + }; >> +}; >> + >> +&cpu_l0 { >> + cpu-supply = <&vdd_cpu_l>; >> +}; >> + >> +&cpu_l1 { >> + cpu-supply = <&vdd_cpu_l>; >> +}; >> + >> +&cpu_l2 { >> + cpu-supply = <&vdd_cpu_l>; >> +}; >> + >> +&cpu_l3 { >> + cpu-supply = <&vdd_cpu_l>; >> +}; >> + >> +&cpu_b0 { >> + cpu-supply = <&vdd_cpu_b>; >> +}; >> + >> +&cpu_b1 { >> + cpu-supply = <&vdd_cpu_b>; >> +}; >> + >> +&emmc_phy { >> + status = "okay"; >> +}; >> + >> +&gmac { >> + assigned-clocks = <&cru SCLK_RMII_SRC>; >> + assigned-clock-parents = <&clkin_gmac>; >> + clock_in_out = "input"; >> + phy-supply = <&vcc_lan>; >> + phy-mode = "rgmii"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&rgmii_pins>; >> + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; >> + snps,reset-active-low; >> + snps,reset-delays-us = <0 10000 50000>; >> + tx_delay = <0x28>; >> + rx_delay = <0x11>; >> + status = "okay"; >> +}; >> + >> +&gpu { >> + mali-supply = <&vdd_gpu>; >> + status = "okay"; >> +}; >> + >> +&hdmi { >> + ddc-i2c-bus = <&i2c3>; >> + status = "okay"; >> +}; >> + >> +&i2c0 { >> + clock-frequency = <400000>; >> + i2c-scl-rising-time-ns = <168>; >> + i2c-scl-falling-time-ns = <4>; >> + status = "okay"; >> + >> + rk808: pmic@1b { >> + compatible = "rockchip,rk808"; >> + reg = <0x1b>; >> + interrupt-parent = <&gpio1>; >> + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; >> + #clock-cells = <1>; >> + clock-output-names = "xin32k", "rk808-clkout2"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pmic_int_l &pmic_dvs2>; >> + rockchip,system-power-controller; >> + wakeup-source; >> + >> + vcc1-supply = <&vcc_sys>; >> + vcc2-supply = <&vcc_sys>; >> + vcc3-supply = <&vcc_sys>; >> + vcc4-supply = <&vcc_sys>; >> + vcc6-supply = <&vcc_sys>; >> + vcc7-supply = <&vcc_sys>; >> + vcc8-supply = <&vcc3v3_sys>; >> + vcc9-supply = <&vcc_sys>; >> + vcc10-supply = <&vcc_sys>; >> + vcc11-supply = <&vcc_sys>; >> + vcc12-supply = <&vcc3v3_sys>; >> + vddio-supply = <&vcc1v8_pmu>; >> + >> + regulators { >> + vdd_center: DCDC_REG1 { >> + regulator-name = "vdd_center"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <750000>; >> + regulator-max-microvolt = <1350000>; >> + regulator-ramp-delay = <6001>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vdd_cpu_l: DCDC_REG2 { >> + regulator-name = "vdd_cpu_l"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <750000>; >> + regulator-max-microvolt = <1350000>; >> + regulator-ramp-delay = <6001>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc_ddr: DCDC_REG3 { >> + regulator-name = "vcc_ddr"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + }; >> + }; >> + >> + vcc_1v8: DCDC_REG4 { >> + regulator-name = "vcc_1v8"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + regulator-suspend-microvolt = <1800000>; >> + }; >> + }; >> + >> + vcc1v8_dvp: LDO_REG1 { >> + regulator-name = "vcc1v8_dvp"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc3v0_tp: LDO_REG2 { >> + regulator-name = "vcc3v0_tp"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3000000>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc1v8_pmu: LDO_REG3 { >> + regulator-name = "vcc1v8_pmu"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + regulator-suspend-microvolt = <1800000>; >> + }; >> + }; >> + >> + vcc_sdio: LDO_REG4 { >> + regulator-name = "vcc_sdio"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + regulator-suspend-microvolt = <3300000>; >> + }; >> + }; >> + >> + vcca3v0_codec: LDO_REG5 { >> + regulator-name = "vcca3v0_codec"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3000000>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc_1v5: LDO_REG6 { >> + regulator-name = "vcc_1v5"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1500000>; >> + regulator-max-microvolt = <1500000>; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + regulator-suspend-microvolt = <1500000>; >> + }; >> + }; >> + >> + vcca1v8_codec: LDO_REG7 { >> + regulator-name = "vcca1v8_codec"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc_3v0: LDO_REG8 { >> + regulator-name = "vcc_3v0"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <3000000>; >> + regulator-max-microvolt = <3000000>; >> + regulator-state-mem { >> + regulator-on-in-suspend; >> + regulator-suspend-microvolt = <3000000>; >> + }; >> + }; >> + >> + vcc3v3_s3: vcc_lan: SWITCH_REG1 { >> + regulator-name = "vcc3v3_s3"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vcc3v3_s0: SWITCH_REG2 { >> + regulator-name = "vcc3v3_s0"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + }; >> + }; >> + >> + vdd_cpu_b: regulator@40 { >> + compatible = "silergy,syr827"; >> + reg = <0x40>; >> + fcs,suspend-voltage-selector = <1>; >> + regulator-name = "vdd_cpu_b"; >> + regulator-min-microvolt = <712500>; >> + regulator-max-microvolt = <1500000>; >> + regulator-ramp-delay = <1000>; >> + regulator-always-on; >> + regulator-boot-on; >> + vin-supply = <&vcc_sys>; >> + >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vdd_gpu: regulator@41 { >> + compatible = "silergy,syr828"; >> + reg = <0x41>; >> + fcs,suspend-voltage-selector = <1>; >> + regulator-name = "vdd_gpu"; >> + regulator-min-microvolt = <712500>; >> + regulator-max-microvolt = <1500000>; >> + regulator-ramp-delay = <1000>; >> + regulator-always-on; >> + regulator-boot-on; >> + vin-supply = <&vcc_sys>; >> + >> + regulator-state-mem { >> + regulator-off-in-suspend; >> + }; >> + }; >> + >> + vdd_log: vdd-log { >> + compatible = "pwm-regulator"; >> + pwms = <&pwm2 0 25000 1>; >> + regulator-name = "vdd_log"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <800000>; >> + regulator-max-microvolt = <1400000>; >> + vin-supply = <&vcc_sys>; >> + }; >> +}; >> + >> +&i2c3 { >> + i2c-scl-rising-time-ns = <450>; >> + i2c-scl-falling-time-ns = <15>; >> + status = "okay"; >> +}; >> + >> +&io_domains { >> + status = "okay"; >> + >> + bt656-supply = <&vcc_3v0>; >> + audio-supply = <&vcca1v8_codec>; >> + sdmmc-supply = <&vcc_sdio>; >> + gpio1830-supply = <&vcc_3v0>; >> +}; >> + >> +&pcie_phy { >> + status = "okay"; >> +}; >> + >> +&pcie0 { >> + assigned-clocks = <&cru SCLK_PCIEPHY_REF>; >> + assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; >> + assigned-clock-rates = <100000000>; >> + ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; >> + num-lanes = <4>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pcie_clkreqn>; >> + status = "okay"; >> +}; >> + >> +&pmu_io_domains { >> + pmu1830-supply = <&vcc_3v0>; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + pmic { >> + pmic_int_l: pmic-int-l { >> + rockchip,pins = >> + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; >> + }; >> + >> + pmic_dvs2: pmic-dvs2 { >> + rockchip,pins = >> + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; >> + }; >> + >> + vsel1_gpio: vsel1-gpio { >> + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; >> + }; >> + >> + vsel2_gpio: vsel2-gpio { >> + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; >> + }; >> + }; >> + >> + usb2 { >> + vcc5v0_host_en: vcc5v0-host-en { >> + rockchip,pins = >> + <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; >> + }; >> + }; >> +}; >> + >> +&pwm0 { >> + status = "okay"; >> +}; >> + >> +&pwm2 { >> + status = "okay"; >> +}; >> + >> +&saradc { >> + vref-supply = <&vcca1v8_s3>; >> + status = "okay"; >> +}; >> + >> +&sdhci { >> + bus-width = <8>; >> + keep-power-in-suspend; >> + mmc-hs400-1_8v; >> + mmc-hs400-enhanced-strobe; >> + non-removable; >> + status = "okay"; >> +}; >> + >> +&sdio0 { >> + clock-frequency = <50000000>; >> + clock-freq-min-max = <200000 50000000>; >> + bus-width = <4>; >> + disable-wp; >> + cap-sd-highspeed; >> + cap-sdio-irq; >> + keep-power-in-suspend; >> + mmc-pwrseq = <&sdio_pwrseq>; >> + non-removable; >> + num-slots = <1>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; >> + sd-uhs-sdr104; >> + status = "okay"; >> +}; >> + >> +&sdmmc { >> + clock-frequency = <150000000>; >> + clock-freq-min-max = <100000 150000000>; >> + bus-width = <4>; >> + cap-mmc-highspeed; >> + cap-sd-highspeed; >> + disable-wp; >> + num-slots = <1>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; >> + vqmmc-supply = <&vcc_sdio>; >> + status = "okay"; >> +}; >> + >> +&tsadc { >> + /* tshut mode 0:CRU 1:GPIO */ >> + rockchip,hw-tshut-mode = <1>; >> + /* tshut polarity 0:LOW 1:HIGH */ >> + rockchip,hw-tshut-polarity = <1>; >> + status = "okay"; >> +}; >> + >> +&u2phy0 { >> + status = "okay"; >> + >> + u2phy0_otg: otg-port { >> + status = "okay"; >> + }; >> + >> + u2phy0_host: host-port { >> + phy-supply = <&vcc5v0_host>; >> + status = "okay"; >> + }; >> +}; >> + >> +&u2phy1 { >> + status = "okay"; >> + >> + u2phy1_otg: otg-port { >> + status = "okay"; >> + }; >> + >> + u2phy1_host: host-port { >> + phy-supply = <&vcc5v0_host>; >> + status = "okay"; >> + }; >> +}; >> + >> +&uart0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&uart0_xfer &uart0_cts>; >> + status = "okay"; >> +}; >> + >> +&uart2 { >> + status = "okay"; >> +}; >> + >> +&usb_host0_ehci { >> + status = "okay"; >> +}; >> + >> +&usb_host0_ohci { >> + status = "okay"; >> +}; >> + >> +&usb_host1_ehci { >> + status = "okay"; >> +}; >> + >> +&usb_host1_ohci { >> + status = "okay"; >> +}; >> + >> +&usbdrd3_0 { >> + status = "okay"; >> +}; >> + >> +&usbdrd_dwc3_0 { >> + status = "okay"; >> + dr_mode = "otg"; >> +}; >> + >> +&usbdrd3_1 { >> + status = "okay"; >> +}; >> + >> +&usbdrd_dwc3_1 { >> + status = "okay"; >> + dr_mode = "host"; >> +}; >> + >> +&vopb { >> + status = "okay"; >> +}; >> + >> +&vopb_mmu { >> + status = "okay"; >> +}; >> + >> +&vopl { >> + status = "okay"; >> +}; >> + >> +&vopl_mmu { >> + status = "okay"; >> +}; >> -- >> 2.7.4 >> > > http://imgur.com/a/6K0t8 > > I can have display in this board, > but need some assigned clock-rate > > assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > assigned-clock-rates = <400000000>, <200000000>; > > assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > assigned-clock-rates = <400000000>, <200000000>; > > > Is it a issue? Are there any pacthes in 4.14 will fix it? Interesting.... I found this board could be bought in taobao.. https://item.taobao.com/item.htm?spm=a1z09.2.0.0.1f30a53flpk7IA&id=554454257549&_u=31t0eea9a1c -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM 2017-08-03 10:32 [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM Jacob Chen 2017-08-03 10:32 ` [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board Jacob Chen [not found] ` <1501756357-10511-1-git-send-email-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org> @ 2017-08-06 15:41 ` Heiko Stuebner 2 siblings, 0 replies; 8+ messages in thread From: Heiko Stuebner @ 2017-08-06 15:41 UTC (permalink / raw) To: Jacob Chen Cc: linux-rockchip, linux-kernel, linux-arm-kernel, devicetree, kever.yang, mark.yao, zhangqing Am Donnerstag, 3. August 2017, 18:32:36 CEST schrieb Jacob Chen: > Add support for the rk3399 sapphire SOM board. > This board works in a combination with the excavator main board. > > You can get more info from below link: > http://opensource.rock-chips.com/wiki_Excavator_sapphire_board > > Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> applied for 4.14 with some property reordering and also replacing the clkreqn pinctrl with the clkreqn_cpm pinctrl as clkreqn was removed as nonworking, see https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/commit/?id=75ea96deec456c3e7aba375115ed530b425d5897 and https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/commit/?id=461a00bb9d539e0a78ad48e5c593f3d145f45c13 Please double check that I didn't break anything Thanks Heiko ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-08-06 15:46 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-03 10:32 [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM Jacob Chen
2017-08-03 10:32 ` [PATCH 2/2] arm64: dts: rockchip: Add support for rk3399 excavator main board Jacob Chen
2017-08-03 21:28 ` kbuild test robot
2017-08-06 15:46 ` Heiko Stuebner
2017-08-06 15:44 ` Heiko Stuebner
[not found] ` <1501756357-10511-1-git-send-email-jacob-chen-fyOeoxGR3m/QT0dZR+AlfA@public.gmane.org>
2017-08-03 10:34 ` [PATCH 1/2] arm64: dts: rockchip: Add support for rk3399 sapphire SOM Jacob Chen
[not found] ` <CAFLEztQOD5rkDRyL9es4vkyFDX-S+WqVuVUH+q4N6YvSaKmoXw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-08-04 9:51 ` Jacob Chen
2017-08-06 15:41 ` Heiko Stuebner
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).